Dielectric Thin Film Measurements Using The Nano-Scratch Tester (NST) From CSM Instruments

Topics Covered

Background

Dielectric Thin Films

Testing

Background

Since the introduction of advanced deposition techniques, the formation of thin films and coatings exhibiting dielectric properties has become commonplace for applications where specific electrostatic properties are required.

Dielectric Thin Films

Dielectric thin films have the unique feature of being able to store electrostatic charge and are finding increased use in areas such as printed circuit boards (PCBs), solar cells and touch-pad screens. In the form of hard coatings, materials in use today include Titanium dioxide, Borosilicates and Titanates (Ba, Sr, Ca, Mg and Pb), these being found in specific applications such as DRAM chips and sensors. Photodefinable dielectric coatings serve many functions such as passivation layers, stress buffers, planarising layers and protective masks for subsequent assembly operations. Their mechanical integrity, as well as adhesion, are important considerations.

AZoNano - The A to Z of Nanotechnology - Optical micrograph (a) of a typical critical failure point for a progressive load scratch on a dielectric thin film. The SFM image (b) confirms the extent of delamination, from which a profile (c) could be extracted in order to verify pile-up phenomena (dotted line in (b)).

Figure 1. Optical micrograph (a) of a typical critical failure point for a progressive load scratch on a dielectric thin film. The SFM image (b) confirms the extent of delamination, from which a profile (c) could be extracted in order to verify pile-up phenomena (dotted line in (b)).

AZoNano - The A to Z of Nanotechnology - NST results for the sample shown in Fig. 1 including residual depth (RD), penetration depth (PD), tangential force (FT) and normal force (FN) curves. The progressive load scratch test was performed over the range 0 - 10 mN with a spherical diamond tip of radius 2 μm. The critical load at which failure of the coating occurred was 4.2 mN.

Figure 2. NST results for the sample shown in Fig. 1 including residual depth (RD), penetration depth (PD), tangential force (FT) and normal force (FN) curves. The progressive load scratch test was performed over the range 0 - 10 mN with a spherical diamond tip of radius 2 μm. The critical load at which failure of the coating occurred was 4.2 mN.

Testing

This article features a typical example of a complete test carried out with the Nano Scratch Tester (NST) from CSM Instruments on a hard dielectric coating of thickness 100 nm. Fig. 1 shows the result of a progressive load scratch which caused coating failure at an applied load of 4.2 mN.

The area around this critical point has been imaged at high resolution with the Scanning Force Microscope (SFM) in Fig. 1 (b) and a profile extracted (Fig. 1 (c)) which confirms the presence of pile-up along the sides of the scratch path. Fig. 2 shows the corresponding measurement results: of particular interest is the observed relaxation of the Tungsten substrate (seen as the difference between the penetration depth, PD, and the residual depth, RD, as measured using the post-scan facility).

Source: CSM Instruments

For more information on this source please visit CSM Instruments

 

Date Added: Dec 4, 2006 | Updated: Jun 11, 2013
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