By Wenhai Han
Table of Contents
Semiconductor Failure AnalysisIntroduction to SMMSMM for
SemiconductorsExperimentResultsConclusionsReferencesAbout Agilent Technologies
Semiconductor Failure Analysis
Failure analysis is a vital process in the development of new products and/or
the improvement of existing products in the semiconductor industry. Successful
failure analysis can identify the root cause of a failed device and guide
corrective actions.
Semiconductor failure analysis often involves a number of different
techniques, such as curve tracing, scanning electron microscopy, transmission
electron microscopy, microthermography, and focused ion beam analysis. Several
techniques based on atomic force microscopy (AFM), such as scanning capacitance
microscopy, conductive AFM, and scanning spreading resistance microscopy, have also
been utilized for the analysis of various failed devices [1].
In this article, semiconductor failure analysis using Agilent
Technologies’ recently developed scanning microwave microscopy (SMM) [2-5]
is demonstrated.
Introduction to SMM
Scanning microwave microscopy combines the high spatial resolution afforded
by an atomic
force microscope (AFM) with the high-sensitivity electric measurement
capabilities of a vector network analyzer (VNA). In SMM [2], an incident
microwave signal generated from the VNA passes through a matched resonant
circuit in the AFM and reaches the end of a conductive probe, which is in
contact with a surface. The reflected microwave from the contact point is sensed
by the probe and returned to the VNA.
By measuring the complex reflection coefficient, or S11 parameter, the
capacitance/impedance at the contact point is obtained from the VNA. In
practice, the mapped signals are the logarithm of the reflection coefficient
amplitude, labeled as VNA amplitude, and the VNA phase. After proper
calibration, the contact capacitance/impedance can be derived from the VNA
amplitude and phase values. Prior to the introduction of SMM, only qualitative
measurements had been used for this type of failure analysis work.
Agilent-exclusive SMM works on all major semiconductor types:
Si, Ge, III-V (e.g., GaAs, InAs, GaN), and II-VI (e.g., CdTe, ZnSe). Unlike
scanning-probe capacitive techniques, SMM does not require an oxide layer. It is
also a superb choice for a wide range of biological and materials science
applications, including the characterization of interfacial properties and
contrast from molecular vibrational modes. In addition to its ability to work on
semiconductors, glasses, polymers, ceramics, and metals, the technique lets Agilent AFM
users perform high-sensitivity investigations of ferroelectric, dielectric, and
PZT materials. Studies of organic films, membranes, biological samples, and ion
channels can also benefit from the use of SMM.
SMM for Semiconductors
When a metal probe is in contact with a silicon surface, it forms a metal
oxide-semiconductor capacitor — well studied in semiconductor physics [6]. In a
simplified one-dimensional model, the total capacitance comes from the
contributions of two capacitors connected in serial: the surface oxide
dielectric layer with a fixed capacitance and the underneath depletion layer in
the silicon substrate with a variable capacitance.
The capacitance variation of the depletion layer in response to an applied ac
bias is determined by the depletion depth, which is in turn largely affected by
the dopant concentration in the substrate. Therefore, by measuring the
capacitance change induced by the applied ac bias, or dC/dV, the dopant
concentration at each contact point can be mapped. Any failure due to abnormal
dopant concentration can then be identified from the dC/dV image, simultaneously
with the capacitance image measured from the VNA amplitude signal.
Experiment
The sample being tested was a depackaged 250nm static random access memory
(SRAM) chip. A standard SRAM unit bit cell contains six field effect transistors
(FETs): two p-type FETs in an n-doped well and four n-type FETs in a neighbor p
well. Among thousands of bit cells on the chip, one was found failed. Inside the
failed bit, one n-type FET was measured having an abnormal threshold voltage Vt.
It was the 48th n-type FET on that row, as shown in Figure 1.
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Figure 1. Optical image of a small section of the tested
SRAM chip. The failed bit contains an n-type FET (the 48th on that row) with an
abnormal Vt.
Scanning microwave microscopy was then utilized in an attempt to find any
unusual properties of the transistor (i.e., properties that differed from those
of the other, normal transistors). A pure Pt metal probe and a conductively
coated silicon probe were both used. The Pt metal probe was 300 to 400 ìm long
and made of solid platinum mounted on an aluminum substrate. Its spring constant
was estimated as being from 0.3 to 0.8 nN/nm; its tip radius of curvature was
approximately 10 to 20 nm. The silicon probe was 125 ìm long and coated with
20nm Ti and 10nm Pt. Its nominal spring constant was 5 nN/nm and it had a tip
radius of about 40 nm.
Scanning was carried out under ambient conditions in contact mode. Selected
microwave operation frequencies were between 2 and 5 GHz. The low frequency
modulation was around 80 kHz. The scan rate was typically from 0.5 to 1
line/sec. Both types of probes showed consistent SMM results on the SRAM chip.
Results
To accurately identify any possible problem with a sufficient level of
detail, every two pairs of FETs on the same row as the failed FET were scanned,
from the 43rd/44th pair through the 51st/52nd pair, as shown in Figure 2. A
total of four sets of images (A, B, C, D) was acquired under the same
conditions. Each set contained topography (top), dC/dV (middle), and VNA
amplitude (bottom) images, which were obtained simultaneously. For illustration
purposes, the even number n-type FETs on the same row as the failed FET were
outlined with squares in all images.
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Figure 2. Four sets (A, B, C, D) of scanning microwave
microscopy images on the failed SRAM chip. Each set contains topography (top),
dC/dV (middle), and VNA amplitude (bottom) images, acquired simultaneously. The
red squares outline the failed 48th n-type FET; the blue squares are normal
n-type FETs on the same row.
The topography images of the 48th n-type FET, outlined by the red squares in
Figures 2 B1 and C1, did not appear to have any structure difference compared to
the other, normal n-type FETs (blue squares as well as the unmarked ones in all
of the topography images). They were also very similar to those seen on other
SRAM samples [2, 4].
In the dC/dV images, however, the difference was quite noticeable. Every
normal n-type FET (blue square) consistently showed a dark area near the center.
The dark (low) value in the dC/dV image represented p-type dopant of the well in
the channel. The 48th n-type FET, on the other hand, was completely flat without
any contrast, as shown in the red squares of both Figures 2 B2 and C2.
The missing p-dopant signal in the 48th n-type FET clearly indicated a change
of dopant structure in the channel area of the transistor. The VNA amplitude
images of the 48th n-type FET, if examined carefully in Figures 2 B3 and C3,
also showed some different structure compared to the other, normal n-type FETs.
This indicated a different capacitance/impedance value.
Conclusions
The utility of scanning microwave microscopy for semiconductor failure
analysis has been demonstrated. Images of dopant concentration measured from the
dC/dV signal on an SRAM chip clearly identified an unusual dopant structure in a
failed n- type FET that differed from other, normal n-type FETs. Capacitance
images measured from the VNA amplitude also showed a different contrast in the
transistor.
This experiment has shown that scanning microwave microscopy can be a
convenient direct-imaging tool for probing a variety of electrical failures in
semiconductor devices at the micrometer to nanometer scale that are not visible
from the surface topography structure.
References
[1] For example, P. Tangyunyong and C. Y. Nakakura, J. Vac. Sci.
Technol. A 21, 1539 (2003); T. Tong and A. Erickson, ISTFA 2004, International
Symposium for Testing and Failure Analysis, 42 (2004).
[2] Wenhai Han, Agilent Application Note 5989-8881EN, 2008.
[3] F. Michael Serry, Agilent Application Note 5989-8818EN,
2008.
[4] Wenhai Han and Hassan Tanbakuchi, ISPM 08, International
Scanning Probe Microscopy Conference, Seattle, June 2008.
[5] Wenhai Han, Photonics Spectra, May 2008, p. 58.
[6] E. H. Nicollian and J. R. Brews, MOS (Metal Oxide
Semiconductor) Physics and Technology, Wiley, New York, 1982.
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