Dry-etching Technology: An Interview with Gilles Baujon

Interview conducted by Kal Kaur

Gilles Baujon, President and CEO at Nanoplas, talks to AZoNano about Dry-etching Technology.

KK - Can you provide me with a brief overview of Nanoplas?

GB - Nanoplas was founded in 2006 and has been a provider of innovative plasma-processing equipment for the semiconductor industry since 2008.

The company’s vision is to achieve a paradigm shift in plasma source design, to enable manufacturing of next-generation ICs.

Nanoplas has achieved its objectives by pioneering two innovative plasma technologies:

  • High-density radical flux (HDRF®) technology, which allows a plasma density up to 1000 times greater than conventional plasma systems, enabling stripping processes to run at lower temperatures for damage-free, high-efficiency cleaning;
  • Atomic-layer downstream etching (ALDE®), enabling extreme selectivity for dielectric film removal applications.

HDRF® technology delivers sophisticated cleaning techniques for MEMS, 3D TSVs, power ICs, LEDs and III-V compounds.

ALDE® technology provides unlimited selectivity for sub-20nm node etching applications, in logic and memory manufacturing.

Both technologies offer high-performance processes, lower-cost, green alternatives for treating silicon wafer surfaces in next-generation IC devices. The company’s plasma-processing tools are used by leading microelectronics companies in North America, Europe and Asia. The company is based near Grenoble, in St-Égrève, France.

KK - Nanoplas has recently introduced the Revolutionary Dry-Etching Technology. How does this technology work to allow for unlimited selectivity?

GB - With conventional plasma sources one needs to compromise between selectivity and etching rate, as they cannot be controlled independently: typically selectivity has to be maintained < 100:1, or even < 50:1, in order to guarantee an acceptable etching rate and thus productivity.

Nanoplas, with its “radikal” source design is not bound by this compromise between selectivity and etching rate. Each can be controlled independently, offering extreme selectivity, without any productivity (etching rate) loss.

The new ALDE® technology by Nanoplas is based on a proprietary plasma source, called “radikal”. This unique plasma source enables a new class of plasma-based etching and stripping processes, with independent control of etch rate and selectivity (figure 1).

Figure 1. Radikal - a proprietary plasma source for Nanoplas’s new ALDE® technology. Image courtesy of Nanoplas.

Nanoplas’s plasma source is an Inductively Coupled Plasma (ICP), which is the most common plasma source type and has been in use for the last 30 years.

KK - How does the new Atomic-Layer Downstream Etching (ALDE®) technology by Nanoplas compare to existing etching techniques in the industry?

GB - For existing etching techniques, selectivity and etching rate cannot be controlled independently: one needs to compromise between selectivity and etching rate.

Wet processes have been used traditionally. They are showing some slight progress towards higher selectivity; they may reach 100:1 selectivity at some point but it will be far too late compared to the requirements of integrated device manufacturers.

As for plasma etching, reactive-ion etching (RIE) techniques have been used to remove some critical dielectrics, but because their selectivity is limited due to ion bombardment they are not viable for next-generation design rules.

Figure 2. Etch selectivity specifications for various device designs of integrated circuits. Image courtesy of Nanoplas.

KK - What are the main features and benefits of your new technology?

GB - The Main features of ALDE® are:

  • Radial distribution of plasma density (from the center of the wafer and all the way to the edge)
  • High density of active species
  • Atomic-layer control of the etching process
  • Independent control of selectivity and etching rate.

Benefits of ALDE® are:

  • Extreme selectivity
  • Excellent uniformity
  • Easy scale-up to 450mm wafers
  • Damage-free processing.

KK - What are the challenges that engineers face in manufacturing next-generation devices and how will your solutions help engineers face these obstacles?

GB - By allowing virtually unlimited selectivity, ALDE® will alleviate many of the challenges engineers face in manufacturing next-generation devices – and enable them to achieve higher yields – because the process window will be larger and will easily integrate with existing pre- and post-ALDE® steps.

This is a huge benefit and driver for IC manufacturing. Bringing a new generation of devices to production is all about having sufficiently large process windows to generate high yields.

KK - How are current wet and dry techniques for the removal of silicon-nitride spacer films comparable to your technology?

GB - Wet processes traditionally have been used for removal of dielectric films such as nitride or oxide layers in CMOS fabrication, but they are unable to meet etch rates with required selectivity at the 20nm node. They are also prone to damage high-k/metal gate (HK/MG) and shallow trench isolation (STI) structures, and are responsible for defectivity and cross-contamination issues when used in batch mode. In addition, handling and disposal of wet process chemicals such as hot phosphoric acid are costly.

Figure 3. Spacer shrinking process step for CMOS integration. Image courtesy of Nanoplas.

Hydrofluoric acid vapor techniques have been envisioned as a replacement to conventional wet processes for removing dielectric films. However, they also exhibit low selectivity results, and require significant environmental health-and-safety controls.

Other reactive-ion etching (RIE) plasma techniques have been used to remove some critical dielectrics, but because their selectivity is limited, they are not viable for next-generation design rules.

KK - Can you discuss the stringent process requirements for your products?

GB - Our equipment, both HDRF® and ALDE®, must meet the stringent requirements of the semiconductor industry: low defectivity, high uniformity of process treatment across the wafer’s surface, high process repeatability (wafer-to-wafer, lot-to-lot), high equipment reliability (uptime) and compliance to all SEMI standards.

KK - How are your Plasma-processing tools encouraging development in leading microelectronics companies in North America, Europe and Asia?

GB - Our plasma-processing tools will alleviate many of the challenges engineers face in manufacturing next-generation devices by providing engineers (process, integration, device, reliability and manufacturing engineers) with much larger flexibility because of the wider process window of ALDE® and easy integration with existing pre- and post-ALDE® steps.

Also, our plasma technologies help to reduce the global use of industrial chemicals.

KK - How do you think your equipment has helped evolve the semiconductor industry?

GB - Applications of our HDRF® technology include isotropic dry release, photoresist stripping, surface activation and dielectrics stripping. HDRF is used for volume manufacturing of MEMS, power ICs, LEDs, III-V compounds and WLP.

Our superior cleaning efficiency increases device yields several ways:

  • no carbon residues post PR stripping and Bosch DRIE
  • lower contact resistance pre-metal deposition
  • larger device design space with high aspect ratio cleaning capability
  • stiction-free dry release
  • low-temperature processing for ultra-sensitive devices
  • no bonding voids with uniform and residue-free surface activation.

KK - What type of application laboratories use your plasma processing technology?

GB - Applications of our HDRF® technology include isotropic dry release, photoresist stripping, surface activation and dielectrics stripping.

Our DSB 6000 has been designed for universities and R&D centers, offering the following advantages:

  • Many possible applications, such as the removal of organic materials (resins, residues, polymers) and activation of surfaces;
  • Robust and reliable (to minimize operating costs);
  • Easy to use (thanks to the use of a touch screen);
  • Extremely compact (L 50cm x W 85cm x H 150cm);
  • Very flexible (both batch and single wafer possible modes, and up to 6 lines of gas).

KK - How do you plan on expanding your design and developments efforts with your equipment to meet the demands of a growing semiconductor industry?

GB - ALDE® is positioned to replace current wet and dry techniques for removal of the many critical silicon-nitride spacer films in most advanced transistor-formation technologies. Nanoplas expects to release a first ALDE® application for SiN etching in Q2.

We will then expend the benefits of ALDE’s extreme selectivity to the removal of other critical films in the manufacturing process of semiconductor devices.

KK - Where can we find further information on your products? 

GB - Some additional information can be found on our website.

About Gilles Baujon

Leveraging his skills in leading teams throughout the microelectronics industry as well as developing and bringing new products to market, Gilles founded Nanoplas in 2006. He began his semiconductor career at IBM, developing wafer-processing equipment for the first 200mm wafer fab in France.

Later, he held management positions at SubMicron Systems and SCP Global Technologies, where he led the SCP development team at SC300, the first 300mm wafer fab in Dresden, Germany. He has managed technology transfers in Asia and Europe, gaining global experience and entrepreneurial vision.

He holds an engineering degree in robotics and a business management degree from HEC (École des Hautes Études Commerciales - Paris).

 

 

Date Added: May 6, 2013 | Updated: Jun 11, 2013
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