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Supercomputing 2014 Conference: Brookhaven Presents Project on Nanostructure Complex Materials Modeling

Supercomputing 2014 Conference: Brookhaven Presents Project on Nanostructure Complex Materials Modeling

As the precision, energy, and output of scientific instruments such as particle colliders, light sources, and microscopes increases, so does the volume and complexity of data generated. [More]
Cadence and Intel Partner to Deliver 14nm Library Characterization Reference Flow

Cadence and Intel Partner to Deliver 14nm Library Characterization Reference Flow

Cadence Design Systems Inc. and Intel Corporation today announced that the two companies have delivered a 14nm (nanometer) library characterization reference flow for customers of Intel Custom Foundry, continuing their collaboration on enabling digital and custom/analog flows for the Intel 14nm platform. [More]
CWI Technical Sales to Represent Strasbaugh’s CMP and Wafer Grinding Products in the US

CWI Technical Sales to Represent Strasbaugh’s CMP and Wafer Grinding Products in the US

Strasbaugh is pleased to announce that on March 3, 2015, an agreement was signed with CWI Technical Sales, making them an official representative of Strasbaugh’s CMP and wafer grinding products in the United States. [More]
Cadence Innovus Implementation System Helps Spreadtrum Reduce Turnaround Time of Multi-Million-Cell 28nm IP Block

Cadence Innovus Implementation System Helps Spreadtrum Reduce Turnaround Time of Multi-Million-Cell 28nm IP Block

Cadence Design Systems, Inc. today announced that Spreadtrum Communications (Shanghai) Co., Ltd. utilized the new Cadence® Innovus™ Implementation System to dramatically reduce the turnaround time of a multi-million-cell 28-nanometer (nm) intellectual property (IP) block while delivering to its power, performance, and area (PPA) goals. Spreadtrum’s TAT for this IP block was reduced significantly while meeting the original PPA targets compared to its previous solution. [More]
DATE 2015: CEA-Leti to Present Newest Version of Leti-UTSOI2 for UTBB-FDSOI Technology

DATE 2015: CEA-Leti to Present Newest Version of Leti-UTSOI2 for UTBB-FDSOI Technology

CEA-Leti today announced the newest version of its advanced compact model for UTBB-FDSOI technology is now available in all major SPICE simulators. [More]
Innovative Fabrication Technique for Hybrid Nanostructure Supercapacitor Electrode

Innovative Fabrication Technique for Hybrid Nanostructure Supercapacitor Electrode

As a novel energy storage device, supercapacitors have attracted substantial attention in recent years due to their ultra-high charge and discharge rate, excellent stability, long cycle life and very high power density. Imagine charging your cell phone in just a few seconds or fueling up an electric car in but a few minutes, which are both part of the promising future that supercapacitors could offer. [More]
Juniper Networks Improves TAT for 28nm IP Implementation for Networking Applications with Cadence Innovus

Juniper Networks Improves TAT for 28nm IP Implementation for Networking Applications with Cadence Innovus

Cadence Design Systems, Inc. today announced that Juniper Networks has utilized Cadence® Innovus™ Implementation System to improve turnaround time (TAT) for physical implementation of their most complex 28-nanometer (nm) intellectual property (IP) for networking applications. The networking company was able to achieve throughput of more than 1.8 million cells per day while also improving out-of-the-box design performance by 15 percent. [More]
Uniquify Selected by Nufront as DDR IP Provider for 28nm SoC Project

Uniquify Selected by Nufront as DDR IP Provider for 28nm SoC Project

Uniquify, a leading high-performance semiconductor intellectual property (IP) and system-on-chip (SoC) integration and manufacturing services supplier, today announced an agreement with Nufront of Beijing, China, to provide a high-performance DDR subsystem IP solution that supports DDR4, DDR3, LPDDR3 and LPDDR2 protocols. [More]
Major OSAT Manufacturer Selects Rudolph JetStep® Advanced Packaging Lithography System for Evaluation

Major OSAT Manufacturer Selects Rudolph JetStep® Advanced Packaging Lithography System for Evaluation

Rudolph Technologies, Inc. announced today that a major outsourced assembly and test (OSAT) manufacturer has selected the JetStep® Advanced Packaging Lithography System for evaluation. The tool, which ships this week, will be used to develop copper (Cu) pillar bumping and through silicon via (TSV) processes used in the development of next-generation flip chip technology. [More]
Freescale® Achieves 7X Turnaround Time Gain on Multiple 28nm Designs with Cadence® Innovus™ Implementation System

Freescale® Achieves 7X Turnaround Time Gain on Multiple 28nm Designs with Cadence® Innovus™ Implementation System

Cadence Design Systems, Inc. today announced that Freescale® Semiconductor has achieved a 7X gain in turnaround time with Cadence® Innovus™ Implementation System over its previous production environment while maintaining its quality of results. [More]
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