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CNSE-NIOSH Partnership for Occupational Safety and Health Research Related to Nanoelectronics

CNSE-NIOSH Partnership for Occupational Safety and Health Research Related to Nanoelectronics

As an embodiment of Governor Andrew M. Cuomo’s public-private partnership model for innovation and economic development, the Colleges of Nanoscale Science and Engineering (CNSE) at SUNY Polytechnic Institute (SUNY Poly) today announced a continued and expanded collaboration with the National Institute for Occupational Safety and Health (NIOSH), which will further expand the CNSE-NIOSH Partnership to Advance Research and Guidance for Occupational Safety and Health in Nanoelectronics. [More]
Future Computer Chips Could be Based on 3D Arrangements of Nanomagnets

Future Computer Chips Could be Based on 3D Arrangements of Nanomagnets

Electrical engineers at the Technische Universität München (TUM) have demonstrated a new kind of building block for digital integrated circuits. [More]
Ideal Organic Single-Crystal Vertical Nanopillars for Harvesting Energy in Solar Cells

Ideal Organic Single-Crystal Vertical Nanopillars for Harvesting Energy in Solar Cells

Using a bio-mimicking analog of one of nature's most efficient light-harvesting structures, blades of grass, an international research team led by Alejandro Briseno of the University of Massachusetts Amherst has taken a major step in developing long-sought polymer architecture to boost power-conversion efficiency of light to electricity for use in electronic devices. [More]
Researchers Create Atom-Scale Semiconducting Composites

Researchers Create Atom-Scale Semiconducting Composites

A little change in temperature makes a big difference for growing a new generation of hybrid atomic-layer structures, according to scientists at Rice University, Oak Ridge National Laboratory, Vanderbilt University and Pennsylvania State University. [More]
Novel Nano-Structure Holds Potential to Develop Highly Stable Nanoscale Memory Devices

Novel Nano-Structure Holds Potential to Develop Highly Stable Nanoscale Memory Devices

RMIT University researchers have brought ultra-fast, nano-scale data storage within striking reach, using technology that mimics the human brain. [More]
NSF Nano-Biosensing Program Awarded Grant to Develop Smart Bioanalytical Systems

NSF Nano-Biosensing Program Awarded Grant to Develop Smart Bioanalytical Systems

A team of researchers from Clarkson University and the University of Missouri have secured a grant from the National Science Foundation for their work in nano-biosensing. [More]
New Ultra-Low Power Technology Platform for IoT and Wearable Device Applications from TSMC

New Ultra-Low Power Technology Platform for IoT and Wearable Device Applications from TSMC

TSMC today announced the foundry segment's first and most comprehensive ultra-low power technology platform aimed at a wide range of applications for the rapidly evolving Internet of Things (IoT) and wearable device markets that require a wide spectrum of technologies to best serve these diverse applications. [More]
ATopTech Optimizes Physical Implementation Tools to Support TSMC 16nm FinFET Plus Designs

ATopTech Optimizes Physical Implementation Tools to Support TSMC 16nm FinFET Plus Designs

ATopTech, a leader in next generation physical design solutions, continued their ongoing collaboration with TSMC by further optimizing ATopTech physical implementation tools to support advanced designs in TSMC 16nm FinFET Plus (16FF+) V0.9 Design Rule Manual and SPICE model. [More]
ANSYS’ RedHawk and Totem Products Receive Certification for TSMC 16-nm FinFET+Technology

ANSYS’ RedHawk and Totem Products Receive Certification for TSMC 16-nm FinFET+Technology

ANSYS announced today that its RedHawk™ and Totem™ products are certified for TSMC 16-nanometer (nm) FinFET+ (N16FF+), a second-generation FinFET technology delivering power, performance and area advantages over the previous generation. [More]
TSMC Certifies Cadence Digital and Custom/Analog Tools for 16FF+ Process

TSMC Certifies Cadence Digital and Custom/Analog Tools for 16FF+ Process

Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced that its digital and custom/analog tools have achieved V0.9 Design Rule Manual (DRM) and SPICE certification from TSMC for its 16FF+ process, enabling systems and semiconductor companies to take advantage of the 15 percent speed improvement with the same total power compared to 16nm FinFET, or 30 percent total power reduction at the same speed compared to 16nm FinFET. [More]