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Combining Computational and Wafer Lithography to Improve Semiconductor Manufacturability

Posted in | Nanolithography | Nanoelectronics | Nanobusiness

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ASML (NASDAQ:ASML)(Amsterdam:ASML) and its subsidiary Brion Technologies today announce LithoTuner™, a new suite of products that integrates computational and wafer lithography to improve semiconductor manufacturability. LithoTuner Pattern Matcher and LithoTuner Pattern Matcher FullChip take scanner matching to a whole new level, with improvements ranging from 30-70% over current scanner matching techniques.

Pattern Matcher optimizes matching over a set of customer selected patterns using adjustments such as numerical aperture (NA), dose and illumination. Pattern Matcher is available for TWINSCAN™ ArF immersion, ArF dry and KrF systems.

Pattern Matcher FullChip extends current scanner matching practices by leveraging Brion’s verification engine to identify all the critical patterns across the entire chip that need to be matched. By coupling this computational analysis with an interface to ASML scanners, a comprehensive matching solution is made available, giving chip makers access to a larger set of tuning adjustments. The additional benefit of this holistic approach is that scanners can be optimized depending on the different chip designs. For the first time, scanner matching optimization can cover the full chip and all customer selected patterns over the entire process window, tuning each scanner in the fab for every product. With a fully tuned fab, customers can increase system utilization by releasing product dedication to scanners for improved process latitude and a better return on their lithography investments.

“LithoTuner shows the benefits of combining computational lithography with detailed scanner knowledge” said Martin van den Brink, executive vice president marketing and technology at ASML. “ASML is the only company that can tie these capabilities together into a holistic lithographic approach.”

Pattern Matcher FullChip has gone through successful evaluations at leading semiconductor manufacturers. “By using Pattern Matcher FullChip we were able to identify various product-specific critical patterns to include in our matching optimization,” said John Lin director of Manufacturing Technology Center at TSMC. ”We have seen scanner performance improvement on product imaging through ASML’s computational lithography capabilities.”

“With Pattern Matcher FullChip, ASML and Brion have broken down the barrier between manufacturing and design,” remarked Jim Koonmen, general manager for Brion. “Instead of a generic ‘design for manufacturing’ approach, LithoTuner allows manufacturing to individually optimize each scanner to each design.”

LithoTuner Pattern Matcher products will be available in the first quarter of 2009.

Posted December 3rd, 2008

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