Samsung Electronics and Cadence Design Systems have commenced the first phase of production of Ambarella’s 32 nm HD digital camera system-on-chip (SoC).
The SoC is being produced in the S-1 line at a facility owned by Samsung by using the 32 nm gate first high-k-metal gate (HKMG) process which was developed by Samsung Foundry, a business of Samsung Electronics, the digital design flow, the incisive and encounter platforms, ARM Cortex processor and the Artisan physical IP.
The product was developed at the design centre of Samsung Foundry by engineers from Samsung Electronics, Cadence Design Systems and Ambarella who worked simultaneously on the SoC. The design of the Ambarella A7L SoC involved a large number of logic gates and proprietary mixed signal blocks. The team of engineers have combined requirements of the process technology, silicon design flows and optimised IP. The collaboration also made full use of Samsung Foundry’s expertise in packaging and testing, turn-key offering and manufacturing for an effective supply chain and reduce the time to market the SoC.
The integrated design flow of the SoC involved the NanoRoute router for 32 nm digital routing and the Encounter digital implementation system. Samsung has also provided support to this partnership by integrating the Ambarella IP into its existing production-ready 32 nm HKMG process technology for the pre-verification of the Ambarella IP.