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First Tape Out of Dual-Core ARM Cortex A9 MPCore Test Chip Using SMIC’s 40 nm Technology

Published on February 29, 2012 at 12:16 AM

By Cameron Chai

ARM, Semiconductor Manufacturing International (SMIC) and Brite Semiconductor have jointly taped out the first dual-core ARM Cortex A9 MPCore test chip utilizing 40-nm low leakage process technology of SMIC.

The test chip is based on a dual-core Cortex-A9 processor engineered utilizing SMIC’s 40-nm low leakage process technology. The processor features a 32K D-Cache and 32K I-Cache, NEON technology, 128 TLB entries and debug and trace technology of the CoreSight Design Kit. Besides incorporating high-speed standard cell libraries, the chip features high-speed tailored memories and cells for improved performance.

The test chip sign-off was at 900 MHz, with standard silicon results anticipated to be up to 1 GHz once they are released in the second quarter of 2012. According to Brite Semiconductor’s President and Chief Executive Officer, Dr. Charlie Zhi, the dual-core chip reduces the costs, risks and time related to the introduction of a high-performance Cortex-A9 processor in the marketplace. The company is happy about the partnership with SMIC and ARM on processor cores and performance optimization, which resulted in the first tape out of this test chip.

SMIC’s Chief Business Officer, Chris Chi commented that the close partnership with Brite Semiconductor and ARM enables the company to provide an integrated platform that is capable of rapidly bringing the designs of customers to production. The integration of Brite's design flow, the ARM Cortex-A9 processor and SMIC’s 40 nm technology will be helpful in fulfilling the rising demand for energy-efficient and high-performance consumer devices.

ARM China’s President Allen Wu stated that this significant landmark with SMIC and Brite Semiconductor is a testament to the capability of the partnership between the three companies and promises a rapid market-reach time for a wide variety of low-power and high-performance devices.

Source: http://www.smics.com

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