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Posted in | Nanoelectronics

IUNET Launches EC-Funded III-V-MOS Nanoelectronics Project with Academic and Industrial Partners

Published on January 8, 2014 at 4:26 AM

Enabling fast and effective design of new transistors for high performance electronics with greatly reduced power consumption: Enabling fast and effective design of new transistors for high performance electronics with greatly reduced power consumption: this is the ambitious objective of a new EC-funded project, "Technology CAD for III-V Semiconductor-based MOSFETs".

The project will be undertaken over the next three years, by a unique multidisciplinary team of scientists and engineers from five European countries and eight Research institutions, Universities and industrial R&D labs, under the leadership of the Italian University Consortium for Nanoelectronics, IUNET.

Nanoelectronics is recognized as a key enabling technology with profound impact on all aspects of our daily life, in particular in the fields of communication, computing, consumer electronics, health, transport, environment and secure societies.

To sustain the progress of high-performance energy-efficient nanoelectronics, a new scenario is currently pursued by the industry worldwide where innovative devices based on so called III-V compound semiconductor materials will replace in part conventional silicon transistors. The integration of III-V devices into silicon platforms may reach production as early as 2018 but, for this scenario to become reality, accurate technology computer aided design (TCAD) tools will be necessary. In fact nanoelectronics relies on intensive use of TCAD to cut development costs and significantly reduce time to market.

The III-V-MOS project consortium addresses this need for advanced TCAD and will provide the European Semiconductor Industry and the European nanoelectronics research centers with dependable, accurate and calibrated models and methods, integrated into user friendly simulation tools, for timely and successful introduction of the new III-V devices in mainstream nanoelectronics technology.

The project builds upon the strong modeling and simulation expertise of European academic partner institutions (IUNET consortium and ETH-Zurich). Future exploitation and high impact of the project results are guaranteed by this group of partners, which includes:

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