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Posted in | Nanoelectronics

IMEC and PRC Offer Joint Program to Solve Packaging Interconnect Gap

Published on October 17, 2007 at 1:27 PM

The Microsystems Packaging Research Center at the Georgia Institute of Technology (PRC)-Atlanta. Ga.,  and IMEC invite interested parties from global industry to join their advanced research program on next-generation flip-chip and substrate technology. The program addresses the key 'IC-to-package to board' packaging interconnect issues for 32nm ICs and beyond.

Building on their complementary capabilities, IMEC and Georgia Tech have joined forces by setting up an industrial affiliation program to solve the packaging interconnect gap. Together with their industrial parties, they will explore, develop and invent new solutions to interconnect high-density ICs with very tight I/O pitches (down to 40-20µm peripheral) to low-cost packages and printed circuit boards. The program targets novel packaging approaches to reduce the mechanical stress on the IC after packaging and assembly. These low-stress packaging techniques become indispensable when using Cu/low-k on-chip interconnections, since low-k materials typically have very weak mechanical properties.

The program will provide solutions for the four major barriers to next-generation flip-chip packaging of scaled ICs and ultra-low-k dielectric ICs. Its aim is to explore and develop:

  1. Organic package interposer substrates that minimize stress at die and package level and enhance the wiring density, the fine I/O pitch routing capability and the high-frequency signal performance of substrates;
  2. A new generation of fine-pitch flip-chip UBM (under-bump metallization) and barrier metallization that meet the electromigration and thermo-mechanical reliability targets of flip-chip scaling;
  3. Novel solder and non-solder interconnect approaches including advanced underfill materials and processes to meet future current density, geometry and reliability requirements;
  4. Thermo-mechanical modeling, design and verification for improved reliability.

The 2-year program is open for the entire supply chain including system companies, IC manufacturers and assembly houses. Partners can benefit from the complementary expertise of the PRC, a global leader and pioneer in package and system integration, and IMEC, a pioneer of silicon-centric technologies. The extensive state-of-the-art facilities for packaging and semiconductor processing, fabrication and integration at both institutes are major assets of this program.

"We are excited to start this unique open program with PRC where we intend to bring together 20-30 expert researchers from industry and academia worldwide;" said Eric Beyne, Program Director Interconnect, Packaging and Systems Integration at IMEC. "Only by joining expertise and know-how from leading players in the packaging and semiconductor field, we will be able to realize highly reliable solutions beyond the traditional flip-chip interconnections."

"The PRC - IMEC synergy in expertise and facilities in ICs, packages and systems is critical to address the barriers in flip-chip reliability, electromigration, ultra-fine pitch I/O substrates and IC-package interconnections. I believe the IMEC-Georgia Tech team can help the global industry in an unparalleled way," said Prof Rao Tummala, Professor and Director of Georgia Tech PRC.

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