The Soitec Group (Euronext Paris), the world's leading supplier of engineered substrates for the microelectronics industry, announced today that Smart Stacking(TM), its circuit stacking technology, is now ready for both manufacturing and technology transfer. This low-temperature industrial process from Soitec's Tracit business unit achieves wafer-level circuit stacking onto a range of starting materials with excellent yield. The ability to move a finished circuit onto another carrier without jeopardizing yield opens new doors for designers. Today, Smart Stacking(TM) enables the production of high-end image sensors; it will soon enable a range of new photonics applications, RF circuits, and the ultimate realization of more complex 3D product architectures.
To decouple circuit fabrication from application needs, Soitec has developed this generic process to transfer thin layers of processed wafers onto a variety of materials. Smart Stacking(TM) technology comprises low-temperature, high-energy wafer bonding, and thinning techniques, both enhanced by Soitec's high volume production know-how. The company reports that several wafer types coming from a number of worldwide foundries and IDMs have been successfully processed for prototyping and production in its state-of-the-art manufacturing line.
"As a substrate manufacturer with world-class industrial capabilities, validated IP and many years of experience, Soitec is offering Smart Stacking(TM) circuit stacking technology using a unique approach," notes Bernard Aspar, vice-president of the Tracit business unit. "For lower volume applications, we can provide circuit stacking custom manufacturing services, but we recognize that higher volume applications may be served best by transferring a customized process to our customers, giving them opportunities to simplify their logistics, reduce costs and shorten cycle times. Therefore we provide both manufacturing service and technology licensing options."
The Soitec Group acquired Tracit (originally a spin-off of the very well known CEA-Leti microelectronics research organization) in 2006. Today's announcement validates this strategic, highly-complementary acquisition, as well as the Group's overall strategy of volume manufacturing, licensing and innovation through the development of breakthrough technologies.
According to a recent study on 3D ICs by Yole Development, an independent semiconductor market research and analysis firm, the demand for wafer-level transfer processing is forecasted to reach significant volume production by 2010/2011, mainly driven by image sensor applications. "By 2012, when the market for 3D integration of heterogeneous components such as memories, logic, power ICs and analog takes off, Soitec's circuit stacking technology will enable further device design simplification and manufacturing with hybrid function capability and technology integration," says Dr. Eric Mounier, co-founder of Yole Development.