Novellus Systems (NASDAQ: NVLS)
today announced the establishment of a joint development program (JDP) with
the IBM Corporation (NYSE: IBM) to design a manufacturing-worthy, copper-based,
three dimensional (3-D) semiconductor Through-Silicon Via (TSV) process using
Novellus' SABRE copper electroplating and VECTOR plasma-enhanced chemical vapor
deposition (PECVD) systems. The new process will enable the 3-D integration
of multiple semiconductor chips in advanced product applications that require
both small form factors and lower power consumption.
There is a strong motivation for the semiconductor industry to move to 3-D
integration using the TSV approach. Stacking multiple chips together in a "sandwich-like"
structure - and connecting all layers together with conductive copper vias -
allows the final module to be smaller in size through an increase in volumetric
circuit density. The short interconnect length between each chip increases device
speed and consumes less power. The stacked chip structure also allows for a
greater range of device-specific functions, including heterogeneous integration,
to meet the needs of today's ever-shrinking electronic products such as cell
phones, PDAs, and laptop computers. However, there are several key challenges
associated with integrating TSVs into existing semiconductor manufacturing processes
so that the new structure is both highly reliable and can be cost-effectively
manufactured. One of the integration challenges is in reducing the excess deposition
of copper or "overburden" while achieving void-free fill of the extremely
deep, high aspect ratio structures, where the overburden thickness varies as
a function of TSV geometry. Another integration challenge requires the ability
to deposit lower temperature dielectric films during the TSV manufacturing sequence
so that the wafer thermal budget limit is not exceeded.
Novellus has developed a unique, high performance SABRE Electrofill TSV process
that uses patented hardware and chemistries to achieve void-free fill with minimal
excess copper deposition. Copper overburden is reduced by 75 percent, allowing
conventional chemical-mechanical polishing (CMP) to be used instead of custom
polishing slurries. Additionally, SABRE's optimized TSV chemistries have faster
plating times, resulting in higher throughputs. To address the requirement of
lower temperature dielectrics, Novellus' VECTOR platform with its patented multi-station
sequential deposition architecture (MSSD) enables the deposition of stable dielectric
films at temperatures less than 200 degrees C with the breakdown voltage, leakage
performance, and wafer-to-wafer repeatability required for reliable, high yielding
TSVs. The SABRE and VECTOR applications simplify the TSV manufacturing process
and enable cost effective, high performance 3-D chip integration for a broad
range of applications. Novellus and IBM will work together to evaluate and further
develop the Novellus processes in IBM's 3-D integration program.
"IBM has a long-standing relationship with Novellus Systems in the area
of Back End of Line (BEOL) copper damascene manufacturing, dating back to the
mid-1990s when the two companies developed the initial tool sets for high volume
manufacturing," said Dr. Subramanian Iyer, distinguished engineer and chief
technologist of IBM's Semiconductor Research and Development Center. "We
look forward to working with Novellus again on this joint development project,
and leveraging the company's core competencies in copper electroplating and
dielectric deposition technologies to this new 3-D integration application."
"Novellus is excited about this latest opportunity to work with IBM to
develop breakthrough process technologies for an emerging market," said
Tim Archer, Novellus' executive vice president of sales, marketing, and customer
satisfaction. "Our SABRE system offers compelling and cost-effective copper
fill technology for through-silicon-via applications. Similarly, our VECTOR
system's MSSD architecture enables the deposition of stable dielectric films
at temperatures less than 200 degrees C - a unique requirement for these new
3-D applications."