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Posted in | Nanoelectronics

New Vertically Optimized Nanometer Design Platform for Advanced Device Production

Published on June 15, 2010 at 2:11 AM

Samsung Electronics, Co., Ltd., GLOBALFOUNDRIES and Synopsys, Inc (NASDAQ: SNPS) today announced the delivery of the industry’s first complete vertically optimized 32/28 nanometer (nm) design platform. Demonstrating the strength of the collaboration established and announced at DAC a year ago, the companies are collectively providing a technology enablement solution for the design and manufacturing of advanced mobile and embedded devices.

The solution consists of optimized high performance, low-power processor and physical IP from ARM; tool enablement, connectivity IP and integrated design flow from Synopsys; and 32/28nm low-power process technology from the Common Platform alliance of IBM, Samsung and GLOBALFOUNDRIES. The Common Platform 32/28nm process uses an innovative high-k metal gate approach to address the limitations of polysilicon technology. It leverages the research and development efforts of the IBM joint technology development alliance to offer a high-performance, low-power manufacturing platform.

The 32nm technology is scalable to 28nm for area optimization. Customers can seamlessly transition to 28nm technology without the need for a major redesign and with lower risk, reduced cost and faster time-to-market.

This complete solution demonstrates the important role industry collaboration has in addressing the increasing complexity of SoC design as technology migrates to smaller geometries. The platform leverages:

  • ARM® Cortex™ high-performance, low-power processor architecture and optimized suite of physical IP including standard cells, power management kit, memory compilers and interface IP, for the 32/28nm HKMG process. The ARM IP contribution delivers valuable low-power and system cost benefits. All physical IP are readily accessible on DesignStart - http://designstart.arm.com
  • Synopsys Lynx Design System, enabled by the Galaxy™ Implementation Platform with IC Validator In-Design physical verification , and the Synopsys DesignWare® portfolio of interface IP. This RTL-to-GDSII implementation solution reduces risk and total design costs for optimized 32/28nm HKMG ARM Cortex processor-based SoC designs.
  • 10 test chips produced through the three-way collaboration in 32 and 28nm HKMG process technology. Producing these chips has helped validated the design platform, including Common Platform PDKs, ARM Physical IP and Cortex processors, Synopsys Interface IP, core tool enablement and design methodology for accelerating first customer silicon success.
  • 32nm low-power HKMG process technology is currently factory-qualified by Samsung. 28nm low-power HKMG process technology to be factory-qualified at GLOBALFOUNDRIES and Samsung in Q1 2011. The 32/28nm process technologies, featuring the innovative Gate First approach to HKMG, offer significant improvements in performance and power consumption when compared to the 45/40nm technology generations.
  • A standardized platform to manufacture 28nm low-power HKMG semiconductors for a new generation of mobile devices, providing the flexibility of multi-sourcing based on the planned synchronization of fabs by members of the Common Platform alliance.
  • Demonstrations and technical sessions of this comprehensive 32/28nm enablement platform will be shown at the 2010 DAC in the ARM-Common Platform-Synopsys booth (#586) “32/28nm Delivered” exhibit. On Tuesday, June 15, the companies will host an access innovation luncheon - where executives from the five allied companies will detail the benefits of 32/28nm HKMG and the accessibility of the enablement platform. Online registration is required at: http://www.synopsys.com/Community/Partners/CommonPlatform/Pages/DAC10CPlunch.aspx

Source: http://www.synopsys.com

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