Novellus Systems (NASDAQ: NVLS) announced today that it has developed conformal film deposition (CFD™) technology for depositing 100 percent step coverage dielectric films on structures with aspect ratios of up to 4:1.
The innovative CFD technology addresses sub-32nm requirements for front-end-of-line (FEOL) applications such as gate liners and spacers, shallow trench isolation high-k metal gate (HKMG) liners, and spacers used for double patterning applications. Novellus' CFD oxide films possess quality and composition comparable to thermal oxide films, including low leakage, high break-down voltage, and low wet etch rate.
Variability in sub-32 nm transistor dimensions is a key area of industry focus due to the impact on device performance. New, highly conformal spacer films have been developed to control these critical dimensions across the wafer. While integrated metrology and advanced process control techniques can minimize wafer-to-wafer and lot-to-lot variability in spacer dimensions, within-wafer variability is controlled by the technology used to deposit the spacer film. Moreover, the dielectric layers used for these spacer films need to be deposited at temperatures that are low enough to minimize dopant diffusion.
Novellus has developed CFD technology that deposits highly conformal films for FEOL applications that meet the quality and low temperature requirements of sub-32nm devices. Figure 1A shows the 100 percent conformality of CFD oxide films deposited on FEOL structures with increasing aspect ratios. The FTIR spectrum in Figure 1B shows the strong similarity between a CFD oxide film deposited at 400°C and a furnace-grown thermal oxide. The current-voltage inset plot shows the high breakdown performance behavior of the CFD film. Furthermore, analysis has shown that the film quality on the sidewall matches that in the field. In comparison to competitive spacer films deposited using an atomic layer deposition process, the combination of Novellus' CFD technology and VECTOR's multi-station sequential deposition (MSSD) architecture delivers superior within-wafer and wafer-to-wafer repeatability, with significantly higher throughput and lower chemical consumption.
With the delay in Extreme UV (EUV) lithography, the semiconductor industry is turning to spacer-based double patterning schemes for sub-3X nm memory and sub-2X nm logic devices. The most cost-effective double patterning schemes utilize a photoresist core followed by a spacer film with 100 percent step coverage. The spacer films have to be deposited using temperatures and chemistries that are compatible with photoresist materials. Spacer films used in a double patterning scheme need to demonstrate excellent conformality with no loading effects that cause line "bending," and yet deliver outstanding within-wafer patterning uniformity.
Novellus' innovative CFD films can be deposited at substrate temperatures less than 50°C, and are therefore compatible with advanced photoresists used in double patterning schemes. Figure 2A shows the 100 percent step coverage of a CFD film over a photoresist structure with no loading effect on the underlying resist. Figure 2B shows that the thickness range of the CFD film is less than 0.2 percent, which translates to less than one angstrom on a typical 300 angstrom thick film, a requirement for advanced patterning at 32nm and beyond.
"CFD technology offers a breakthrough in the deposition of low temperature dielectric films with quality equivalent to a furnace deposition," said Kevin Jennings, senior vice president of Novellus' PECVD Business unit. "As device dimensions shrink beyond 32nm, films deposited using CFD technology will be required for multiple applications. The ability to deposit these films on the reliable, production-proven VECTOR platform ensures superior within-wafer and wafer-to-wafer repeatability, with significantly higher throughput and lower chemical costs."