Posted in | News | Nanoelectronics

Applied Seals North America Leads Task Force to Develop Semiconductor-Grade Sealing Standards

To help the global semiconductor industry prepare for the 22 nm technology node and the use of 450 mm wafers, sealing products supplier Applied Seals North America, Inc. is leading a new SEMI Standards task force to develop the first substantial standards for perfluoroelastomer (FFKM) o-rings and sealing elements.

These components are used extensively throughout semiconductor-manufacturing equipment to create and maintain the ultraclean environments in which ICs are made.

The total available market for semiconductor-grade seals is more than $400 million, according to Dalia Vernikovsky, chairwoman of the F51-0200 SEMI Standards task force and president and general manager of Applied Seals North America.

The F51-0200 task force held its kick-off meeting on January 21. Initial members of the group are professionals from industry leaders including IBM, Intel, Micron and Novellus as well as seal manufacturers Applied Seals North America, Nippon Valqua Industries and Parker Hannifin.

"Our charter is to educate the industry and eliminate the misapplication of o-rings, which results in significant costs and downtime," Vernikovsky said. "Defining sealing standards can save the industry a huge amount of time and money because seals are so pervasive in everything from ultrapure water systems and chemical handling to virtually all deposition, etching and cleaning steps."

In its first meeting, task force members agreed to focus the group's early efforts on developing standards for:

  • Specifying the important parameters to consider for these standards and how to measure them, which is quite challenging due to the wide variety of chemical and physical properties for both seals and semiconductor-manufacturing processes
  • Rating the applicability of seals to create a standard way of measuring successful sealing performance

Up-to-date standards are needed to define semiconductor-grade sealing characteristics required for manufacturing ICs today. Most sealing technology used in wafer fabs was originally developed for unrelated applications in heavy industry, not sensitive IC production. As the semiconductor industry advances, factors ranging from the design of slit valves and gates to seals' compatibility with next-generation processing materials must be examined to assess their ability to accommodate smaller device geometries and larger wafer diameters.

Currently, the only industry standard for semiconductor-grade seals is a general guideline for using elastomeric sealing technology. Vernikovsky spearheaded its development in 1999, leading to SEMI's publication of the guideline in 2000.

Source: http://www.appliedsealsna.com/

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