By Will Soutter
The Taiwan Semiconductor Manufacturing Company (TSMC) has certified the Calibre Litho Friendly Design (LFD) signoff lithography checking tool developed by Mentor Graphics for verification of its 20 nm integrated circuits manufacturing process.
The Calibre LFD tool can be used to check if the circuit design allows adequate process window and also to detect hotspots. In the manufacture of integrated circuits, optical proximity correction is employed during the mask stage of the process to rectify features with issues. For those features that cannot be rectified by the aforementioned method, the Calibre LFD tool enables the identification of the defects in the design stage and ensures rectification before tapeout. The pre-tapeout lithography verification eliminates delays in later stages of manufacturing as a result of re-design and also helps avoid manufacturing issues pertaining to lithography.
Pre-tapeout lithography verification became the industry norm with the advent of 40 and 28 nm manufacturing processes. The same practice continues for the 20 nm process. Joe Kwan, Product Marketing Manager at Mentor Graphics for Calibre LFD and DFM Service, stated that they have been working in conjunction with TSMC right from the inception of TSMC’s litho process checking (LPC) development project in order to incorporate the Caliber LFD tool with the integrated Design for Manufacturing (DFM) engine of TSMC. Suk Lee, Senior Director, Design Infrastructure Marketing Division at TSMC stated that LPC aids in checking 20 nm designs with double patterning for conformity to DFM requirements and would also eliminate hotspots pertaining to lithography. He believes that the combination of their DFM engine and Calibre LFD will provide precise lithography checking.