Nov 5 2013
Will feature its FinFET-ready DFY products that range from nano-scale SPICE modeling to giga-scale SPICE simulations at the 2013 ProPlus Technology Symposiums in Shanghai, China, and Hsinchu City, Taiwan. Dr. Chenming Hu, TSMC distinguished professor of the Graduate School at the University of California, Berkeley, will be the keynote presenter at the Shanghai symposium and offer a perspective on the 3D FinFET transistor he and his team invented.
WHO:
ProPlus Design Solutions, Inc. (www.proplussolutions.com), the global leader for SPICE modeling solutions and the leading technology provider for Design-for-Yield (DFY) applications
WHEN and WHERE:
Shanghai, China
Tuesday, November 5, from 9:15 a.m. until 5:15 p.m. Registration begins at 8:45 a.m.
Parkyard Hotel, Zhangjiang
Register at: [email protected]
Hsinchu City, Taiwan
Thursday, November 7, from 9:15 a.m. until 5:15 p.m. Registration begins at 8:45 a.m.
Ambassador Hotel, Hsinchu
Register at: [email protected]
The agenda includes presentations on:
- 9812D, the latest generation wafer-level, 1/f noise measurement system for fast, accurate data collection in the range of 1hertz (Hz) to 10MHz.
- FinFET Modeling Solutions with BSIMProPlus™, the leading modeling platform for nanometer devices used by all leading foundries.
- NanoSpice™, a next-generation giga-scale high-performance parallel SPICE simulator able to handle 100-million+ element designs, with foundry-validated model accuracy, including FinFET and other advanced nodes.
- NanoYield™, a fast, accurate yield versus power, performance, area (PPA) analysis platform for memory, analog and digital designs with High-Sigma Monte Carlo capabilities licensed from and validated by IBM. NanoYield also includes fast process, voltage and temperature (PVT) and fast Monte Carlo applications.
For more information about ProPlus Design Solutions, visit www.proplussolutions.com.
Press release avilable from http://www.marketwired.com/
Source: http://www.proplussolutions.com/