Tanner EDA has established itself as a crucial link in the process of designing Analog/Mixed-Signal ICs, ASICs and MEMs. The company provides fully-integrated solutions for schematic entry, circuit simulation, waveform probing, netlist extraction, full-custom layout editing, placement and routing, netlist extraction, LVS and DRC verification on the Windows® platform. Its solutions have become increasingly critical in the face of growing challenges brought on by shorter time-to-market cycles, increasing cost constraints and lack of available resources.
Today the company boasts 4,000 customers and over 25,000 active licenses in 64 countries worldwide. The thousands of tape-outs in applications ranging from biomedical, imaging and power management to MEMS are a testament to the rich functionality and maturity of Tanner EDA solutions.
Tanner EDA's flagship products, the L-Edit®, HiPer Verify® and T-Spice®, form the foundation of the company's mission to automate and simplify the design, layout, and verification of Analog/Mixed-Signal ICs, ASICs and MEMS, from concept to silicon. The company's solutions are designed to be used stand alone or to easily augment a company's existing design tool flow. Tanner EDA solutions are the only EDA tools on the market that natively support the Mentor Graphics Calibre® and Cadence Dracula® formats. This support enables them to use foundry rule decks as is, without conversion or modification.
Today, Tanner EDA is looking to redefine "Concept to Silicon" with an expanded focus on high-performance solutions. Tanner EDA's continued design tool innovation makes it the perfect cost-effective solution that grows with a company as its performance needs change.