Adequate quality control of integrated circuit (IC) components is fundamental during the development phase, allowing design and process engineers to evaluate the functionality of a new device before it reaches the final package test, where the late realization of design flaws can be extremely costly in terms of time-to-market issues. Production line control is also important to maintain quality standards and check the properties of materials arriving from outside suppliers.
Integrated Circuit Characterization
The Nano Hardness Tester (NHT) from Anton Paar has already shown its value in being able to accurately measure the mechanical properties of IC aluminum bonding pads. However, its combination of high positioning accuracy (< 1 μm) and automated measurement of hardness and elastic modulus at a nanometer scale, make it ideally suited to characterization of many different kinds of IC structure. For example, a modern IC may consist of many circuit tracks which are of deposited gold, copper or aluminum. These are usually thin films of thickness 0.5 - 3.0 μm and the track width may be as small as 10 μm. The substrate may be a relatively hard substrate (e.g., silicon) but in other cases may be a much softer material (e.g., polymer) such as those used for printing heads. The adhesion of the fi lm to the substrate is an important consideration, as is the hardness and elastic modulus.
Nanoindentation can reveal significant information regarding the structural integrity of a certain coating. For the case of aluminum bonding pads, which must serve the dual function of a probe-testing and bonding platform, mechanical properties need to be accurately controlled. Insufficient hardness of the film results in deep scrub marks (during probe-testing) which then prevent a good bonding between the pad and the gold connecting wire. In addition, if the pad is too soft then substantial debris may be produced when the probe tip comes into contact with it, this being a very important consideration in such a particle sensitive environment. Surface topographical observation (e.g., scanning force microscopy (SFM)) is also useful in measuring the surface roughness of IC contacting parts as a high roughness may induce premature wear, or prove detrimental to the functionality of the specific device.
Figure 1. Optical micrograph of a 200 mN nanoindentation performed on a circular bonding pad consisting of a 1 μm aluminum film deposited onto a Si substrate.
The optical micrograph shown in Fig. 1 shows a 200 mN indentation placed in the center of a circular bonding pad (pad diameter = 40 μm). In this case, the indentation depth is slightly greater than the pad thickness in order to investigate the deformation which is produced. This can be used to simulate the effect of a probe tip contacting the pad during the device testing procedure. Indenting through the coating can also cause cracking or delamination of certain coatings from the substrate. This allows fracture toughness to be investigated in addition to hardness and modulus. Fig. 2 shows a typical gold conducting track onto which a nanoindentation has been placed. Highly precise position control is required in order to measure the properties of the gold independently to those of the surrounding Si structure. The size of the indentation is also important because if it is too large then the measured mechanical properties may not be representative of the track material alone.
Figure 2. Optical micrograph of nanoindentations placed in the Si structure of an IC device (left) and on a gold conducting track (right). Note that the positioning accuracy of the NHT allows the indent to be accurately positioned within a track of width 15 μm. The track is produced by lithographic etching, after which gold is deposited by sputtering into the prefabricated channel.
This information has been sourced, reviewed and adapted from materials provided by Anton Paar.
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