Table of Contents
The dimensions of semiconductor devices have been moving to 1X-nm node and below for a number of years now in order to match the demands of the market for faster and more efficient designs every year. There have been improvements in device fabrication techniques from 65 nm in 2006 to the 1X node at 14 nm in 2014.
According to the International Technology Roadmap for Semiconductors, current projections have the first sub-1X node devices at 7 nm to be launched by 2017  .
To match this progress, manufacturers must have the capability to meet metrology requirements that simultaneously demand improvements in resolution, accuracy, and precision. In order to meet these requirements, the tools should provide nanoscale imaging for vital dimension measurement and results that are repeatable and accurate enough to optimize productivity in a mass production environment .
A compelling nanometrology solution for these challenges has been developed at Park Systems in the form of atomic force microscopy (AFM) tools with software specifically customized for the automation of data acquisition and analysis.
The software is called Park XEA  and it enables a process control engineer to use AFM systems to obtain repeatable and accurate nanoscale images of target devices based on user-defined processes in tailor-made recipe files. The corresponding increase in productivity makes this integrated software and hardware solution suitable for wafer-level device fabrication plants in all areas.
A three-inch patterned silicon wafer sample was used in this experiment. The target pattern on the wafer is consists of rectangular pits, which have step heights of 120 nm and pitches of 10 µm. Roughness and topography analysis at the target pattern was done on two of the pits.
The sample was then mounted onto the stage of a Park NX-HDM AFM system  for imaging using the XEA software. AFM imaging in air was conducted with a silicon-based cantilever in non-contact mode. Five measurement locations were chosen within the wafer as illustrated in Figure 1a:
Figure 1a. The five measurement sites selected for imaging from the sample patterned silicon wafer.
The reference measurement location (site #5 on Figure 1a) for developing the automated recipe was placed at a NOR gate device on the wafer. Four extra measurement sites of the same patterned device were chosen at various XY coordinates on the wafer to carry out automated measurements of sample characteristic topography as well as roughness.
To start preparing the measurement and analysis recipe, the XEA software was put through a pair of teaching routines to enable it to optically identify the location of the sample pattern and cantilever tip. These teaching routines as shown in Figures 1b and 1c are comprised of optical image and XY stage modifications and user-taught data fed into the software in order to direct the hardware to move the target pattern measurement sites to the tip landing position.
Figure 1b. Optical camera feed from the XEA software interface displaying a 95% confidence level in the software’s ability to recognize the sample pattern.
Figure 1c. Optical camera feed from the XEA software interface displaying a 95% confidence level in the software's ability to recognize the cantilever. The red crosshair is a user-defined estimate of the cantilever tip's location.
Furthermore, the initial reference scan image of the sample pattern is used to modify XY offsets in positioning when required. For instance, if a target pattern for study is not consistently optically recognizable by the software, a user can describe the pattern’s location relative from a close by landmark that is.
Then the recipe would be prepared to automatically transfer the sample to the cantilever tip accordingly, using the landmark for orientation. This is completed with nanometer-level precision so that the user-defined region is accurately imaged. With the teaching routines completed and XY offsets established, scan parameters to obtain roughness data and sample topography are then fixed by the user.
The entire set of instructions and calibrations are assembled into a recipe file that can now be used to operate automated measurements on the sample. Immediately after measuring each site, the XEA recipe is scripted to instantly perform an automatic analysis of the gathered data. An aggregated report for the data obtained at each measurement site is then available after all measurement sites have been tested and the recipe exhausted.
Once scanning was completed, it was discovered that the AFM had accurately imaged the five user-defined measurement sites. Their roughness and topography were measured concurrently inside the user-defined locations as seen in green rectangles in the given AFM images and the shaded blue columns in the line profiles incorporated into Figures 2a-2e.
To discover the roughness and step height of the device inside the user-defined area of interest, two locations were measured in each area: VZ1, located at the bottom of the first pit from the left edge of the device, and Reference, a site on the raised area between the first pit and the second pit to its right.
Figure 2a. AFM topography image of measurement site #1 with green inset rectangle denoting specific area of interest. This area's line profile is also provided along with recorded step height (H) and roughness (R) values gathered by measuring sites VZ1 (in the sixth device pit) and Reference (in the raised area between the sixth and last device pits).
Figure 2b. AFM topography image of measurement site #2, area of interest line profile, and collected step height (H) and roughness (R) values.
Figure 2c. AFM topography image of measurement site #3, area of interest line profile, and collected step height (H) and roughness (R) values.
Figure 2d. AFM topography image of measurement site#4, area of interest line profile, and collected step height (H) and roughness (R) values.
Figure 2e. AFM topography image of measurement site #5, area of interest line profile, and collected step height (H) and roughness (R) values.
Step height was acquired by measuring the difference between the average height calculated at a Reference location and the same measured at the VZ1 location. This difference in height is also seen in the color map used for the AFM images in Figures 2a-2e as deeper, recessed features such as the pits have a darker color, while the raised areas between them have a much lighter color.
The device’s roughness values were again measured by scanning the specific locations VZ1 and Reference, with the pit floor roughness (at VZ1) being the key interest area.
The gathered data illustrates that the five sites have pits that are roughly 130 nm in height and pitches of 10 µm in length. Also, the pitch length can be visually confirmed repeatedly by just viewing each AFM topography image in Figures 2a - 2e.
All of the topography images can be used to visually verify while the AFM did not scan the same exact target area at each measurement site, the degree to which each inset green rectangle was offset can be calculated within one micron - an extremely small sum of variance given the automation used in the study.
After the user-defined recipe completes operation, the final step height and roughness values gathered are provided in tabular form by the software (Table 1).
Table 1. Step height (H) and roughness (R) values measured at each of the five selected sites with corresponding averages and standard deviations
It is noted that the sample was in contact with ambient air for a significant amount of time before being scanned with the AFM. This caused sample contamination on many locations on the wafer including all measurement sites, but particularly at sites 2 and 5.
This matches the discrepancies noticed in the line profiles obtained in Figures 2b and 2e and the roughness values illustrated at each of these two sites. The standard deviation in roughness is in fact larger than what would be anticipated for a pristine sample.
This deviation could be due to the contaminants that gathered on the surface of the sample over a period of time exposed to ambient air. This contamination had the unplanned effect of further showcasing the sensitivity of the AFM measurements and its ability to distinguish differences in attributes at nanoscale.
Using a Park NX-HDM AFM system with XEA, an automation software from Park Systems, five identical NOR gate devices on a three-inch patterned silicon wafer comprising of rectangular pits with 10 µm pitch and 120 nm step height were effectively imaged. Through a user-defined recipe developed by incorporating optical pattern recognition and the precision of AFM, accurate and repeatable nanoscale metrology with quantifiable data via automated data acquisition and testing was shown on all five patterns.
With this capacity to automate data acquisition and testing, this process has a feasible application in similar fields. Fields such as wafer design research (critical dimension measurement) and bare silicon wafer manufacturing (surface roughness) are two areas of research and industry that regularly conduct studies that could greatly increase their throughput and efficacy by integrating a tool capable of fully automated AFM.
 Moammer, K. (n.d.). TSMC Launching 10nm FinFET Process in 2016, 7nm in 2017 Read more: Http://wccftech.com/tsmcpromises- 10nm-production-2016-7nm- 2017/#ixzz4AXXp5M3v. Retrieved June 3, 2016, from http://wccftech.com/tsmcpromises- 10nm-production-2016-7nm-2017/
 J. Foucher; R Therese; Y. Lee; S.-I. Park; S-J. Proc. SPIE 8681, Metrology, Inspection, and Process Control for Microlithography XXVII, 868106 (April 18, 2013); doi:10.1117/12.2011463
 Park NX-HDM features - Automatic Measurement Control. (n.d.). Retrieved June 03, 2016, from http://www.parkafm.com/index.php/product s/industrial-afm/park-hdm/applications
 Park HDM - Overview | Park Atomic Force Microscope. (n.d.). Retrieved June 3, 2016, from http://www.parkafm.com/index.php/product s/industrial-afm/park-hdm/overview
This information has been sourced, reviewed and adapted from materials provided by Park Systems Inc.
For more information on this source, please visit Park Systems Inc.