Precision 3D Nanomachining of Silicon Nanowires

Table of Contents

Nanoscale Etching


In semiconductor fabrication, the most common material used is silicon. It is commonly used in in areas such as MEMS, electronics, NEMS, and photonics because of its properties, ease of processing, and availability.

Nanoscale etching for silicon, such as the formation of advanced geometry transistor gate (e.g. FinFET), photonic crystals, trench isolation, and nanowires, is gaining increased attention. The potential applications of nanowires are photonics[1], photovoltaics[2], optoelectronics[3] and microelectronics[4].

The focus of this article was to demonstrate the formation and control of the shape of nanowire arrays at the wafer scale using a top-down fabrication technique - employing a combination of Displacement Talbot Lithography (DTL) [5] and plasma etch.

Nanoscale Etching

A mixed gas nanoetch process[6] based on a SF6 - C4F8 chemistry (known as the pseudo-Bosch process) was chosen for this work. The process involves continuously passivating the sidewalls for anisotropy while keeping the etch-front clear by accelerated ions at room temperature.

This provides a controlled etch rate and good sidewall quality (devoid of scallops that are common in the Bosch process). The etch profile is independent of the crystalline orientation of silicon. As etch openings shrink, it is somewhat limited in selectivity and aspect ratio compared to the cryogenic process.

100 mm thick silicon wafers were patterned by using a 30 x 30 mm2 array of nanodots (100 nm diameter and 200 nm thick PR/BARC (PFI88/AZBarli-II200)) using DTL to produce a mask for nanowire fabrication.

This non-contact proximity exposure technique employs two orthogonal exposure cycles and a phase-shift line pattern mask, followed by development and 1:1 transfer of the PR pattern into the BARC with N2-based directional plasma etching to obtain the nanodots. This is a faster and cheaper method compared to direct write alternatives to pattern at the nanoscale.

A dry etch developed on Oxford Instruments Plasma Technology’s PlasmaPro 100 Estrelas system was used to transfer the nanodots into an array of 100nm wide nanowires on a 250 nm pitch.

The mask was slightly conical, so the sloped profile translated down into the final structure as the mask eroded, and the edge of the mask pulled back during an anisotropic etch, which narrowed the top of the nanowire slightly.

If the selectivity is high, the mask pulls back less, and a deep etch can be performed for a given mask thickness. The baseline process developed had a selectivity >5:1 to the resist (Figure 1) to etch nanowires to a depth of 440 nm in single stage process and a vertical etch rate of 125 nm/min with a depth uniformity <±1%.

The resulting profile was almost vertical (~89º). Optimizing the mask initial profile or etching with a hard mask (e.g. oxide or alumina) with higher selectivity, could result in further improvements. A thicker mask or higher selectivity could also potentially yield deeper nanowires.

Figure 1. Cross-sectional SEM of a conventional nanowire array etched to 440 nm depth

The width of the nanowires was modulated by tuning etch-passivation gas ratio against the bias power (controlling the energy of the accelerated ions at the etch front) as the etch progressed in order to realize shaping in the third dimension. In order to narrow nominally 100 nm diameter nanowires to around 50 nm, demonstration of single and double width modulations was carried out (Figure 2).

Figure 2. Sketch of target example structures in nominally 100 nm diameter nanowires

The single modulation was developed with the addition of an under-passivating stage to decrease the nanowire width, a balanced process to obtain a thinned vertical section, and an over-passivating stage was included to restore the nanowire width. By adjusting the process, the degree of thinning, its location, and the length of thinned region can be controlled.

A single modulation with a 53 nm thinned region of length 226 nm is shown in Figure 3. The overall nanowires were etched to 484 nm using an etch rate of 186 nm/min and a selectivity to the mask of >5:1. Steps to thin and increase the width of the nanowire twice were the additional steps needed to achieve double modulation.

Figure 3. Cross-sectional SEM of a single width modulation (53 nm x 226 nm) in a nanowire array

To achieve this, the modulation length was reduced within a similar depth of 460 nm using a selectivity of 9:1 and uniformity <±1% and a vertical etch rate of 118 nm/min (Figure 4).

Figure 4. Cross-sectional SEM of a double modulated nanowire array (Upper: 59 nm x 95 nm; Lower: 54 nm x 107 nm).


The focus of future work will be to increase the depth by optimizing the mask, examine tuning of transitions achievable in the process, and fabricate highly intricate 3D nanowires.


1. Tao Song et al., Nano Energy 1 654, 2012

2. Zhiyong Fan et al., Nano Res 2 829, 2009

3. Wei-yu Chiu et al., Optics Express 15 15500, 2007

4. Hyunsung Park and Kenneth B Crozier, Scientific Reports 3 2460, 2013

5. Harun Solak et al., Optics Express 19 10686, 2011

6. S S Walavalkar et al, Nanoscale 5 927, 2013

This information has been sourced, reviewed and adapted from materials provided by Oxford Instruments Plasma Technology.

For more information on this source, please visit Oxford Instruments Plasma Technology.

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