On-Chip Quantum Optics with Photonic Circuits

Quantum optics is a quickly emerging field where single photons can be employed in applications such as universal quantum computing, simulation of complex quantum systems and secure communication. Until now, experiments in this field have been mainly done using bulk optics, i.e. with optical tables full of mirrors, lenses and other components. This is not a highly scalable approach for more sophisticated experiments as the stabilization, alignment and required space of the optical tables become increasingly impractical. However, these issues, can be avoided using integrated optics, and with the help of a Raith EBPG5000+ [1, 2]. This on-chip approach is pursued by Dr. Menno Poot from the University of Yale, USA.

On-chip Quantum Optics

Quantum information is encoded on single photons that serve as qubits [3] in the linear quantum optics approach. On a chip, “dual-rail encoding” is the most natural way of doing encoding. Two optical waveguides can be considered: a single photon represents the logical “0” state as it travels through the first, whereas a single photon in the other waveguide is “1”. An interesting fact is when a Y-splitter is used, there is an equal possibility of detecting the photon in either of the two output waveguides, and therefore a superposition of 0 and 1 is created. Generally, any unitary quantum operation on a single qubit can be implemented when photons are sent via well-designed photonic circuits comprising of directional segments and couplers with relative length differences. Although, two-qubit operations can also be carried out, in linear optics quantum computing these are non-deterministic processes. A post-selection of the results of the experiment can be made by identifying the photons; this implements an efficient interaction between pairs of photons. This is at the heart of the well-known “KLM scheme” [4]. Photon detection should be made at the maximum possible efficiency. Thus, integrating the detectors on the same chip as the photonic circuits is important to prevent interconnect loss. Very narrow superconducting wires [5] are used to make detectors with the best quantum efficiency. These devices temporarily go to the normal state upon absorbing a photon that result in a measurable voltage pulse. The chip has to be cooled to extremely low temperatures, whenever superconductors are used. In order to keep the chip cold, the amount of heat dissipated on it must be minimized. For this reason, electrostatically controlled phase shifters are used to make the quantum circuits programmable.

Figure 1. Dark field micrograph of a device for a controlled NOT quantum operation. Grating couplers (blue triangles) are used to get single photons on the chip. The quantum operation is implemented using photonic circuits with directional couplers. Each individual device, such as the one shown here, measures 1.5 by 1 mm.

Figure 2. Details of the integrated quantum optical devices. (a) Etch windows for releasing the optoelectromechanical phase shifters. The photoresist protects the superconducting single-photon detectors from the etchant. (b) Zoom of an “H” phase shifter. The electrodes are yellow, the released device and waveguide are green, and the silicon oxide (as well as a very thin layer of SiN) is indicated in blue. (c) Optical waveguide with an SSPD (red) on top. The inset shows the apex and alignment on the waveguide. (d) Bird’s eye view oft he CNOT circuit. The rings are used to determine the relative optical phases in the as-fabricated circuits [7]. Four of the eight phase shifters are partly visible.

Without dissipating any heat, these MEMS devices work well at cryogenic temperatures [6]. Shown in Figure 1 is an overview of a finished chip with various elements highlighted in Figure 2.

Fabrication Process

More than six lithography steps are required, given the many different technologies that are combined when making the chips (i.e. MEMS, superconductors, photonics). Standard photolithography is employed by two of these technologies, whereas the others are carried out with electron-beam lithography. A Raith EBPG5000+ was used for this purpose. The initial point is a Si wafer with thermally grown LPCVD Si3N4 and SiO2 layer. The latter serves as a cladding, with the movable parts and optical circuits implemented in the silicon nitride. This material has outstanding mechanical and optical properties. A few nm of NbTiN are sputtered on material surface; at around 11 K, these thin films become superconducting. In the initial step, alignment markers and electrodes are defined. Following which, the superconducting detectors are written and etched. In the next two steps, reactive-ion etching is used to pattern the SiN. A thin SiN layer is left behind in the first step, while the second etches all the way into the underlying oxide. Now the mechanical structures are released by submerging the chip in buffered hydrofluoric acid, followed by critical point drying.

Lithography Challenges

A number of challenges are faced in e-beam lithography while writing these complex circuits which can be met with sophisticated equipment such as the EBPG.

Proximity Effect Correction

The first to be written on the chip is the metal layer, and as both large (190x90 µm) contact pads and fine features such as the narrow (as little as 125 nm) gap between the movable and fixed electrodes are involved, different beam currents are employed. Figure 3 shows how the exposure is optimized using proximity effect correction to prevent overexposure.

Figure 3. Micrograph of developed PMMA, which was written without proximity effect correction. The nine narrow electrodes required to actuate the phase shifters are overexposed in the region between the large contact pads.


Stitching is unavoidable because the size of the individual devices exceeds the largest write field of the EBPG5000+. Even at the largest field sizes, EBPG stitching artefacts can be reduced or even fully removed by using intrinsic methods and/or data processing.

Figure 4. Micrograph of a waveguide that crosses the boundary between two write fields (indicated by the dotted line). The EBPG shows excellent stitching, which is specified as < 15 nm.


The relative placement of all the different layers is another key aspect. The metallic markers are indispensable. As shown in Figure 5, these metallic markers are protected with a cover of SU-8 which is patterned using photolithography. To achieve accurate overlay of the different layers, this protection is essential.

Figure 5. Markers after etching through the SiN. The top row shows the images as acquired using the integrated BSE detector of the EBPG5000+. The left two panels are markers without protection. Redeposited gold (b) creates regions with high electron scattering [bright spots in (a)] that prevent accurate marker recognition. With SU-8 protection (c, d), the marker remains unaffected (c), resulting in good overlay. The optical micrograph in (d) shows the markers underneath the SU-8 protection; the marker indicated by the arrow was exposed.

High Resolution for SSPDs

Writing the single-photon detectors is another lithography challenge. Figure 2(d) shows how a photon momentarily breaks the super-conductivity, when it is absorbed in U-shaped nanowire made out of patterned NbTiN. This is only possible when the wire is very narrow and thin. The film deposition sets the thickness, which is usually 4-8 nm. However, the width is set by the lithography. Using high-resolution HSQ resist and small beam step size, nanowires as narrow as 30 nm were effectively fabricated. In addition, the flexibility of e-beam lithography permits the effects of the detector geometry on aspects such as its quantum efficiency to be studied.

Smooth Waveguides

Ultimately, smooth waveguides are obtained through small beam step sizes. Propagation losses of 1.5 dB/cm [2] were obtained with relatively little effort. This can be made better by using even smaller resolutions, or by reflowing the ZEP 520A e-beam resist after developing it. In both cases, smoother waveguides with even lesser scattering loss are found.

Figure 6. Overview of an integrated optical quantum device after the final fabrication step.

Conclusion and Outlook

For the nanofabrication of the integrated photonic circuits, the Raith EBPG is the ideal tool. Accurate placement of the different lithography steps is achieved by the tool’s good overlay using automated marker search and alignment. The ease of switching resolutions and beam currents as well as the PEC support enable flexible writing strategies. This is done intuitively using the graphical Cview and Cjob utilities supplied with the EBPG. Presently, Menno Poot is working on further optimization of all the individual components developed on the chips and their characterization at cryogenic temperature. In the next step, non-classical light such as photons will be sent into these exciting devices and more complicated optical quantum circuits shall be designed and produced.


[1] M. Poot, H. X. Tang et al., Photonic quantum optics circuits with integrated superconducting single-photon detectors and optomechanical phase shifters, In preparation

[2] M. Poot, C. Schuck, X.-S. Ma, X. Guo, H. X. Tang, Design and characterization of integrated components for SiN photonic quantum circuits, Opt. Expr. 24 6843-6860 (2016)

[3] P. Kok, W.J. Munro, K. Nemot, T.C. Ralph, J. Dowling, G. J. Milburn, Linear optical quantum computing with photonic qubits, Rev. Mod. Phys. 79 135-174 (2007)

[4] E. Knill, R. Laflamme, G. J. Milburn, A scheme for efficient quantum computation with linear optics, Nature 409 45 (2001)

[5] C. Schuck, X. Guo, L. Fan, X. Ma, M. Poot, H. X. Tang, Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip Nature Communications 7 10352 (2016)

[6] M. Poot and H. X. Tang, Broadband nano-electromechanical phase shifting of light on a chip, Appl. Phys. Lett. 104 061101 (2014)

[7] M. Poot and H. X. Tang, Characterization of optical quantum circuits using resonant phase shifts, Appl. Phys. Lett. 109 131106 (2016)

This information has been sourced, reviewed and adapted from materials provided by Raith.

For more information on this source, please visit Raith.

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