Chemical-mechanical polishing, or CMP in short, is a standard manufacturing process used in the semiconductor industry during the production of memory disks and integrated circuits.
If the aim is to eliminate surface materials, then the process is known as chemical-mechanical polishing. By contrast, if the aim is to flatten the surface, it is generally referred to as chemical-mechanical planarization. AFM can be used to easily define the electrical properties and topography of polished surfaces.
Topography image showing an integrated circuit structure with multiple transistor contacts (image height range: 25 nm). After polishing, contacts may appear as high or low structures on the surface. Some contacts are almost at the same height level as the surface and are thus difficult to identify in topography alone. Contacts protruding from the surface exhibit a slight “tail” towards the right. This “tail,” visible in both trace and retrace, is a result of the polishing direction applied.
Several of the transistor contacts show a clear electric conductivity in the C-AFM image in contact mode, but at varying levels (yellow-red). Others, particularly in the central structure, only show very low conductivity (light blue), while most contacts on the outside of the image show no conductivity at all (dark blue). Contacts with similar conductivity are clustered together in groups and show an overall symmetrical (mirrored) arrangement.
Sample Current Mapped to Topography
A current profile of the polished IC sample was produced by tracing a path across the sample (and over an array of transistor contacts), as shown in the left image below. The current profile, thus obtained, is illustrated on the right image.
(Left) Current map indicating the path of the profile as followed across the sample. The profile started at the bottom of the image crossing all high conductivity areas to the top of the image. (Right) The resulting current profile. Different levels of conductivity could be identified within the sample.
DC Bias-Dependent Conductivity of Contacts
A sample area is sequentially imaged with varying tip bias. Surface conductivity on this IC sample can only be seen by applying a negative DC bias voltage to the conductive tip.
At negative tip bias, certain contacts show conductive properties (Left). At positive tip bias, previously conductive contacts do not conduct (Center). Applying a negative tip bias once more restores the conductivity of those contacts (Right).
Voltage I–V Curves on Selected Locations
Based on the location on the surface of the sample, voltage I–V curves display considerably varied profiles. Each I–V curve was not recorded on the base chip material, but on a contact.
Current image (Left), topography image (Center), and I-V curves (Right). Colored arrowheads indicate the locations where the I-V curves were recorded.
This information has been sourced, reviewed and adapted from materials provided by Nanosurf AG.
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