Nanoelectronics Experts to Present at SEMICON West 2010 in California

SEMATECH and International SEMATECH Manufacturing Initiative (ISMI) will highlight current research through a wide range of lectures and workshop sessions from July 13-15, in conjunction with SEMICON West 2010 in San Francisco, CA.

SEMATECH and ISMI experts will report their latest advances in new materials and device structures, next-generation metrology, and equipment and fab productivity, with a special focus on addressing key opportunities and challenges in 3D interconnect technology.

“Our goal is to promote innovative and practical solutions for continued scaling of semiconductor technologies that can easily be incorporated into real-world manufacturing environments,” said Dan Armbrust, president and CEO of SEMATECH. “Through various presentations and workshops we look forward to sharing our technical knowledge and best practices, exploring the promise of 3D interconnects, and introducing new manufacturing concepts to help drive our industry forward.”

Several SEMATECH and ISMI experts are scheduled to speak on the SEMICON West TechXPOT Stage, in the North Hall of Moscone Center, on July 14, including:

  • Paul Kirsch, SEMATECH’s director of Front End Processes, “Metal Oxide RRAM as a Future Non-Volatile Memory Technology,” at 11 a.m.
  • Dilip Patel, ISMI’s Metrology program manager, “Measuring the Nanoscale: Metrology Challenges in Manufacturing,” at 12:20 p.m.
  • Bryan Rice, SEMATECH’s director of Lithography, will moderate the Advanced Lithography TechXPOT session from 2 – 4:30 p.m.

Additionally, SEMATECH and ISMI will host various public workshops during SEMICON West:

  • Equipment suppliers and end users will meet to address the issue of overspecification of utility capacity for semiconductor process tools at the ISMI Equipment Energy Workshop - Overspecification on July 12 at 8 a.m., at the Marriott Marquis.
  • ISMI’s Cluster Tool Performance Tracking Workshop will provide insight and training on an innovative methodology developed by ISMI to determine the performance metrics of multi-path cluster tools. The workshop will also offer equipment performance benchmarking solutions on July 12 at 1 p.m. in the Club Room, at the Marriott Marquis.
  • Equipment suppliers will discuss the viability of a standard communications interface protocol between the main tool and support equipment such as roughing vacuum pumps and point of use abatement devices at the ISMI Equipment Energy Workshop – Standardized Communication Protocol for Idle Mode on July 12 at 1 p.m., at the Marriott Marquis.
  • Hosted by SEMATECH, in collaboration with Fraunhofer IZFP, the second workshop on Stress Management for 3D ICs using Through Silicon Vias will discuss DFM-like approaches for managing stress, including required material properties, measurement techniques and corresponding simulation use modes on July 13 at 9 a.m., at the Grand Hyatt.
  • As a part of the ISMI Installed-base Equipment Series, ISMI will host the following workshops at the Marriott Marquis:
    • OEM-focused Dry Etch Process Equipment Workshop, on July 13 at 8:00 a.m.
    • Equipment Productivity Workshop on Dry Etch Chambers, on July 14 at 8:00 a.m.
    • OEM-focused Dry Etch Process Equipment Workshop, on July 15 at 8:00 a.m.
  • Co-sponsored by SEMI and SEMATECH, the 3D Interconnect Challenges and Need for Standards Workshop will provide the vision and progress to date on 3D TSV integration, solicit areas of concern, and identify the areas of variance between existing solutions and proposed/anticipated solutions on July 13 at 1:00 p.m., at the Marriott Marquis.
  • Equipment suppliers will share their plans on how new and existing wafer metrology technologies can be used, modified, or enhanced to measure and improve 3D interconnect processes at SEMATECH's 3D Metrology Workshop on July 14 at 1:00 p.m., at the Marriott Marquis.
  • Co-organized with SEMI, ISMI’s e-Manufacturing Workshop will focus on the Equipment Data Acquisition interface (Interface A). e-Manufacturing enabling implementation strategies on the Interface A requirements, including the next freeze level, will be presented to an audience of chip-makers, equipment companies and software suppliers on July 14 at 1:00 p.m., at the Marriott Marquis.
  • Co-organized with SEMI, ISMI’s Product and Equipment Time Metrics Workshop will provide a forum to introduce the concept of “Product and Equipment Time Metrics” to the semiconductor industry. Participants will gain an understanding of the definition and use of the time metrics concepts as an alternative method for identifying, measuring, and improving factory and equipment productivity on July 15 at 1 p.m., at the Marriott Marquis.

Some of SEMATECH’s and ISMI’s most prominent technologists in the nanoelectronics industry will be attending SEMICON West. Interviews with executives and technical experts are available upon request.

Source: http://www.sematech.org/

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