STATS ChipPAC, a semiconductor solutions provider, has revealed the advanced 3D embedded Wafer Level Ball Grid Array Package-on-Package (PoP) technology solution.
The scalable 3D technology allows for a reduced package profile height of less than 1 mm, which is a significant 30%reduction in height over the standard 1.4 mm stacked package height. The PoP approach offers the flexibility required for combining logic and individual memory packages vertically into a solution in the standard total stacked package of 1.4 mm height.
The eWLB PoP technology developed by STATS ChipPAC offers customers cost, height and performance advantages over other substrate-based PoP technologies. The bottom PoP package height has been successfully reduced below the 0.5 mm mark using the fan-out wafer level packaging approach offered by the eWLB. The solution is available as double- or single-sided configuration and its flexible platform enables stacking of memory packages with a stacked final height of less than 1mm.
The Executive Vice President and CTO of STATS ChipPAC, Dr. Han Byung Joon stated that eWLB enables advanced 3D PoP technology to achieve greater input/output (IO) density and heterogeneous die integration in reduced footprint than is feasible using standard flip chip and PoP technology.
The eWLD solution features power-efficient and high-performance capabilities in an ultra-thin and small-sized package profile for use in media tablets, cloud computing and smartphones. More than 200 million eWLB units have been shipped by STATS ChipPAC. eWLB is best suited for RF, MCU, networking, power management, baseband, connectivity and other emerging applications. Manufacturing costs are significantly reduced by using eWLD technology as it uses a combination of back-end and front-end semiconductor manufacturing process, which increases electrical and thermal performance at a lower package footprint.
STATS ChipPAC will showcase the eWLD 3D packaging technology along with other solutions at the 2012 IMAPS International Conference and Exhibition on Device Packaging from 5 - 8 March in Scottsdale, Arizona.
Source: http://www.statschippac.com