According to Paul Otellini, president and chief executive officer at Intel, the three-dimensional Tri-Gate transistor design has been incorporated by his company using Moore’s Law for volume production, and will enable development of advanced technologies and solutions.
Moore’s Law predicts the development pace of silicon technology, saying that the transistor density will double once in two years. It enhances capabilities and performance, and reduces costs.
The devices allow chips to function at a low voltage with low leakage, and enhance performance and energy efficiency, enabling chip designers to choose application-based transistors specifically for low power or high performance environments.
The devices enhance performance by up to 37% at low voltage. This makes them applicable in small handheld devices using low energy to flip back and forth.
The flat two-dimensional planar gate has been replaced in the three-dimensional version with a nano-size silicon fin rising vertically out of the silicon substrate. The power is monitored through a gate on the three sides of the fin, two on each side and one on the top. The extra monitoring allows for energy to flow as required when the device is in the operational mode, and minimally when not in use, helping the device to switch rapidly from one state to the other.
The device structure helps monitor density. The vertical fins allow the devices to be stacked in close proximity ensuring space and cost- efficiency. These features will enable designers to increase the fin size for better performance and power-efficiency.
The device will be incorporated into the company’s production process called the 22nm node. Over 6 million 22nm three-dimensional transistors could fit into a quantum dot. The company recently showcased the 22nm microprocessor, called ‘Ivy Bridge’ in a laptop, server and desktop computer.
This silicon technology will help deliver integrated Intel Atom processor-based solutions customized for performance, functionality and software capability of the company’s design.
Source: http://intel.com