US-based STATS ChipPAC, which specialises in providing advanced packaging and semiconductor test services has announced that it will cater to a wide range of the semiconductor markets including media tablets, smartphones and cloud computing-based applications by using its fan-out wafer level packaging (FO-WLP) technology.
The company will be presented data on the technology at the International Wafer Level Packaging Conference that was held in California.
This technology includes the embedded Wafer Level Ball Grid Array (eWLB) which has the capability of high performance despite having an ultra-thin profile. STATS ChipPAC has already delivered around 150 million units of eWLB to the semiconductor market. Apart from developing the next generation eWLB for advanced applications such as large die, small die, stacked package-on-package, multilayer and multi die, the company is also in the process of integrating its two other technologies namely integrated passive devices and through silicon via into 3D and 2.5D designs. This will enable the company to achieve functionality and flexibility by effectively integrating heterogeneous technology into applications where silicon lithography nodes and mixed die sizes are combined.
According to Hal Lasky, Executive Vice President and Chief Sales Officer the semiconductor market requires to cater to the converging market where customers desire more functionality, computing speed and power, by providing added features and increase production according to the life cycle of the product. The company’s eWLB has been successfully received by semiconductor companies who are keen on catering to the needs of the converging market.
Source: http://www.statschippac.com