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Posted in | Nanolithography

MagnaChip Implements Proteus LRC for Cost-Effective Lithography Verification

Published on February 26, 2013 at 4:18 AM

Synopsys, Inc., a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the adoption of Synopsys' Proteus™ LRC by MagnaChip Semiconductor Corporation, a Korea-based designer and manufacturer of analog and mixed-signal semiconductor products.

MagnaChip uses Proteus LRC in their production mask synthesis flow to identify hotspot locations in designs that are sensitive to variations in the manufacturing process. Detecting these locations early in the mask creation process improves yield by enabling hotspots to be mitigated prior to committing a design to manufacture.

"Our increasing design complexity requires a tool that accurately identifies manufacturing hotspots early in the mask creation flow when corrective action is most feasible," said Jung Lee, senior vice president of Platform Technology for MagnaChip's corporate engineering division. "Proteus LRC provides a cost-effective lithography verification solution with the accuracy and reliability we need to avoid yield-impacting hotspots."

The industry-proven accuracy of Synopsys' Proteus compact models and Synopsys' Sentaurus™ Lithography rigorous models are combined in Proteus LRC to provide a highly accurate hotspot detection capability with optimized turnaround time. Proteus LRC uses this unique access to both compact and rigorous models to efficiently identify features that are sensitive to process variation. Efficient analysis of results and fast disposition of hotspots is facilitated by Proteus' Error Analysis Module, which merges the compact and rigorous model simulations into a single environment for review.

Proteus LRC is built on the Proteus engine and is integrated into Synopsys' Proteus Pipeline Technology, enabling an efficient single-flow solution from design tapeout to mask fracture. The Pipeline delivers concurrent processing at all stages of the mask synthesis and fracture flow to minimize I/O time for optimized handling of large terabyte datasets encountered at leading-edge technology nodes. The Proteus engine provides an industry-proven platform that is highly scalable to hundreds, even thousands, of CPUs. This enables control of turnaround time while maintaining the lowest cost of ownership through the use of standard x86 processor cores.

"The accuracy of Proteus LRC is a critical component for first-pass yield at companies like MagnaChip," said Howard Ko, senior vice president and general manager of the Silicon Engineering Group at Synopsys. "Proteus LRC delivers industry-leading accuracy with its unique access to compact and rigorous models while maintaining the lowest cost of ownership."

Source: http://www.synopsys.com/

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