Semiconductor Failure Analysis Techniques

By Nidhi DhullMar 8 2024Reviewed by Megan Craig, M.Sc.

Failure analysis is an essential part of a complex reliability evaluation in the semiconductor industry. In an industrial environment, failure analysis may start from a preliminary analysis through a generalized flow chart and end up with in-depth advanced techniques.¹

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The first step for semiconductor chips is visual inspection using an optical microscope or electrical measurements.² Mechanical probing, electron beams, emission microscopy, liquid crystal, etc., are used to locate the faults.

The final detailed analysis is performed using techniques like electron microprobe, focused ion beam, X-ray photoelectron spectroscopy, and secondary ion mass spectrometry.²

Failure Analysis in the Semiconductor Industry 

Currently, semiconductors form the backbone of key industries, ranging from heavy to light ones, including mobile phones, electric vehicles, solar energy, artificial intelligence, communication, aerospace, and supercomputers. Accelerated testing is crucial to ensure the reliability of the devices. It is important to quickly identify the problems and prevent the reoccurrence of such failures.¹

The detection of a failure and its rapid solution in a laboratory environment is crucial for large-scale manufacturing of miniaturized semiconductors.⁴ Failure analysis is important to ensure that the semiconductor industry successfully keeps up with Moore’s law, which estimates a doubling of the number of transistors in an integrated circuit (IC) about every two years. It helps in the identification of the reasons for failure, understanding the mechanism behind failure, and implementation of long-term remedies.³

Failure of a device may not always mean that it ceases to function. Degradation of a device parameter can also be a failure. For instance, drift in a MOSFET’s threshold voltage from the set value can hamper the operation of the whole circuit. An increase in the line resistance of an interconnection because of electromigration may result in a line delay time higher than its specification.² Thus, determination of the root cause of a failure is essential, which can be trivial in some cases while may require near-atomic level resolution in other devices.¹

Common Failure Analysis Techniques

Analysis of a wafer or epitaxial layer for contamination, scratches, cracks, roughness, and morphology can be easily performed using an optical microscope. In case of deeper cracks in the suspected subsurface, mid-infrared microscopy is required to see through the device.¹

Scanning electron microscope (SEM) allows analysis of a semiconductor surface and cross-section with high resolution, revealing contamination, cracking, or thermal damage. Additionally, electrical defects in semiconductors can be identified by irradiating them with an SEM’s electron beam and detecting the current or voltage thus generated.¹

Laser-scanning microscopy is well known as a localized failure analysis method for silicon ICs. A laser having a wavelength greater than the bandgap of the test sample is rastered across it to obtain a 2D map of the defects. This method is cost-effective and can give a defect area map of a chip of the size of several millimeters.¹

Emission microscopy is generally used for failure location on chips including detection of weak spots in gate oxides.² Hot electron behavior of MOSFETs can be characterized by measuring substrate current, which correlates well with the light emission and hence reveals device degradation.² Photoemission microscopy is traditionally used in imaging damaged areas in LEDs and dislocation arrays in silicon ICs.¹

Semiconductor failure analysis in terms of the thermal properties of a sample is performed using techniques like fluorescent micro-thermography, infrared thermography, and photothermal radiometry. These techniques are material-specific and give information about heat capacity, thermal conductivity, film thickness, material inhomogeneities, and delaminations.²

Since the degradation of a device leads to an increase in noise, noise spectroscopy can be applied for failure analysis. Low-frequency noise is generally used to study the deep levels in MOSFETs. A noise-based technique can be used for failure analysis even in a tiny area device, which is not possible for traditional capacitance-based deep-level transient spectroscopy.²

Advanced Techniques and Instrumentation

The choice of failure analysis technique largely depends on the semiconductor-based product. Secondary ion mass spectroscopy (SIMS) is used to detect contamination of the epitaxial layers grown using metal-organic gases. Undesired impurities in such semiconductors are a result of contamination of the source gas itself or vacuum leaks in the reactor. SIMS is capable of detecting contaminants at ppb level.¹

The atomic constitution of the impurities can be estimated using energy-dispersive X-ray spectroscopy. (EDX or EDS). It also reveals the 2D distribution of an element in comparison to the SEM image from the same area. This method is used in catastrophic failure analysis like electrode degradation or solder migration in a device.¹

Structural determination of defects is possible using transmission electron microscopy (TEM). It can help to determine the Burgers vectors of dislocations and the character of stacking faults and dislocation loops.¹

Atomic force microscopy (AFM) is used for the cross-sectional study of a degraded device. By probing the sample with a sharp tip, AFM reveals the dopant modifications and electronic properties of defects with very high resolution.¹ Conducting AFM tips can be used to probe a sample at sub-micron dimensions.²

Case Studies and Applications

Lately, AI tools are being implemented for semiconductor failure analysis. A recent study published in ACS Applied Nano Materials demonstrated the effectiveness of AI-integrated physical modeling on the electrical response of the device. It was able to reveal defects equivalent to a needle-in-a-haystack.

The researchers applied electrical nanoprobing through a defect dataset to achieve a 99.5% defect region classification on a nanoscale FET. With the use of machine learning, such failure analysis data collected from present devices can be implemented on the new transistor technologies, thereby accelerating the advanced and reliable semiconductor production process.³

Another recent study in the Journal of Materials Research and Technology demonstrated a step-wise failure analysis on silicon-based device materials through optical and high-resolution microscopic assessments.

It involved the subsequent use of a high-power optical microscope, X-ray diffraction, 3D profilometer, high-power UV-Vis spectrophotometer, field emission scanning electron microscopy (FESEM), and field emission transmission electron microscopy (FETEM). Such detailed analysis revealed multiple defects on the Si epilayers in the form of patches and accumulated contaminations.⁴

 Hence, straightforward microscopic techniques as well as complex advanced methods, can be used for semiconductor failure analysis. The aim is to ensure the reliability and accuracy of the electronic devices as semiconductors are being rapidly scaled down.

See More: In-Situ Mechanical Testing of Semiconductor Devices

References and Further Reading

1. Ueda, O., & Herrick, R. W. (2012) Failure Analysis of Semiconductor Optical Devices. Springer EBooks. pp. 19–53. doi.org/10.1007/978-1-4614-4337-7_2
2. Schroder, D. K. (2015) Semiconductor material and device characterization. John Wiley & Sons. ISBN:9780471749097 |DOI:10.1002/0471749095
3. Pan, J., et al. (2021) Transfer learning-based artificial intelligence-integrated physical modeling to enable failure analysis for 3 nanometer and smaller silicon-based CMOS transistors. ACS Applied Nano Materials, 4(7), pp. 6903-6915. doi.org/10.1021/acsanm.1c00960
4. Gopinath, S. C. B., et al. (2022) Failure analysis on silicon semiconductor device materials: optical and high-resolution microscopic assessments. Journal of Materials Research and Technology, 21, pp. 3451–3461. doi.org/10.1016/j.jmrt.2022.10.116

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