Cadence Design Systems,
Inc. (NASDAQ: CDNS), the leader in global electronic design innovation,
announced today that Sequans Communications, an industry leader in fixed and
mobile WiMAX chipmaker, has used the Cadence® Low-Power Solution to implement
innovative power-efficient design techniques into its newest 65-nanometer Mobile
WiMAX baseband and RF single die chip, the SQN1210, which was unveiled at the
Mobile World Congress in Barcelona.
Sequans' new chip represents another milestone reached in advancing WiMAX technology,
as it integrates baseband and triple band RF into a single die, and does not
require an external DRAM memory bank, resulting in even more area savings for
system integrators. In addition, the chip is capable of operating at 600MHz
while still operating with minimal power consumption of less than 350mW, with
fully loaded MIMO traffic. During standby mode, the chip's total power drops
to less than 0.5mW, leading to prolonged battery life for devices powered by
the chip. The Cadence Low-Power Solution contributed to these innovative low
power achievements.
Sequans was able to optimize the power by using multi-mode, multi-corner analysis
and multi-supply voltages to reduce power consumption by up to 95 percent in
power shut-off mode. Total design turnaround time was accelerated by using the
Common Power Format (CPF)-enabled flow, which preserves design intent (thereby
eliminating painfully slow manual translations), and by calling upon Cadence
Design Services for expert advice. Finally, Sequans employed a closed-loop power
verification methodology to fully validate the design before tapeout, resulting
in first-pass silicon success.
"One of our key is our ultra-low-power consumption," said Laurent
Sibony, IC design director of Sequans Communications. "The Cadence Low-Power
Solution allowed us to meet and exceed our performance and power targets for
this important device. In addition, theCadence Design services organization's
commitment to our success played a key role in allowing us to achieve our market
window."
The Cadence Low-Power Solution continues its leadership role as a robust solution
used in dozens of production tapeouts. Sequans used the complete CPF-enabled
Cadence Low-Power Solution for this project, including the Incisive® Enterprise
Simulator, Encounter® Conformal® Low Power, Encounter RTL Compiler and
Encounter Digital Implementation System. Cadence Design Services provided expertise
on physical implementation and signoff power analysis for this design.
Using the integrated signoff power analysis capabilities in the Encounter Digital
Implementation System, Cadence Design Services was able to obtain real-time
signoff power analysis during implementation, including voltage drop and power
switch electrical verification, significantly reducing design turnaround time.
"Sequans' tremendous success is a tribute, in part, to the efficiency
of the Cadence Low-Power Solution and the Cadence Design Services team,"
said Steve Carlson, vice president of Low-Power Solutions at Cadence. "The
Sequans tapeout experience demonstrates that the Cadence Low-Power Solution
delivers on rigorous power budgets, while improving design efficiency."