The Soitec Group (Euronext Paris), the world's leading supplier of engineered
substrates for the microelectronics industry, announced today volume production
of its new generation of state-of-the-art high-resistivity (HR) silicon-on-insulator
(SOI) substrates to serve the growing cellular phone and Wi-Fi markets.
Soitec recently completed qualification at major customers for volume
production in response to their rapidly growing demand. Soitec fined-tuned its
HR-SOI process to stabilize the base wafer resistivity in order to meet all
cellular electrical specifications.
The shift to multi-band, multi-mode radio functionality in today's handsets
and the growth of Wi-Fi based-applications is driving a move to SOI-enabled
solutions, which can enhance integration and programmability while reducing
cost-of-ownership (COO) in RF Front End Modules more effectively than competing
technologies. Soitec's Smart Cut technology is used to integrate a high
resistivity base wafer enabling low signal absorption below the oxide. This
high-resistivity option for SOI wafers enables chip designers to reach
unprecedented levels of RF and mixed signal integration, which will free up
valuable area for the RF functions by a factor of ten on the board.
"Our HR-SOI capacity is in place to serve the growing cellular market
demand," says Paul Boudre, Chief Operating Officer, Soitec. "This new substrate
generation enables chip designers to meet their demanding wireless performance
requirements - low RF substrate loss, high isolation, high linearity - on very
cost-effective silicon."
High-resistivity handle layers can also be combined with advanced SOI
technologies that leverage a very thin top layer of silicon. Such wafers are
excellent candidates for combining wireless functionality with lower power and
higher speed logic on a single chip using a standard SOI CMOS process.
Manufactured in 200mm, Soitec's HR SOI substrates offer >1kOhm.cm
resistivity, available in any custom silicon and box thickness. The company also
offers HR SOI substrates in 300mm for the system on chip (SoC) market working at
the 90nm node and below.
Source: http://www.soitec.com/en/index.php