Kilopass’ NVM IP Completes Reliability Testing on TowerJazz 130 nm CMOS Process

Kilopass Technology has announced that its XPM embedded one-time programmable anti-fuse non-volatile memory (NVM) intellectual property (IP) has successfully qualified the reliability testing as per the JEDEC 47 specification for the TowerJazz 130 nm G CMOS process.

During qualification, Kilopass Technology’s three test chip lots have successfully completed a 1,000-hour reliability testing for high temperature storage life (HTSL) and high temperature operating life (HTOL) on the TowerJazz 130 nm G CMOS process as per the JEDEC 47 standard.

This qualification allows mixed and analog signal designers creating SoCs on the 130 nm G CMOS process to have an anti-fuse NVM IP memory block source offering 1 kb to 1 Mb of secure storage for trim and calibration data with more than 10 years of data retention and reliability.

The Kilopass XPM deals with markets such as PMIC, capacitive sensors, RF power amplifiers and other mixed-signal applications. The Vice President of Customer Support and General Manager for TowerJazz Mixed-Signal CMOS Business Unit, Ilan Rabinovich commented that the company is satisfied with the results of Kilopass' XPM non-volatile memory IP blocks from the JEDEC 47 specification three-lot qualification for the TowerJazz 130 nm G CMOS process. Through this qualification, the company’s customers now have another long-life, high-reliability NVM IP source for their designs, Rabinovich concluded.

According to Linh Hong, Kilopass Technology’s Vice President of Marketing, designers who use TowerJazz's foundry can now use an embedded non-volatile memory that is programmable in the field to tune circuits that fluctuate over time and to accumulate trimming data for mixed or analog designs without silicon cost.

Source: http://www.kilopass.com

Citations

Please use one of the following formats to cite this article in your essay, paper or report:

  • APA

    Chai, Cameron. (2019, February 12). Kilopass’ NVM IP Completes Reliability Testing on TowerJazz 130 nm CMOS Process. AZoNano. Retrieved on April 29, 2024 from https://www.azonano.com/news.aspx?newsID=24236.

  • MLA

    Chai, Cameron. "Kilopass’ NVM IP Completes Reliability Testing on TowerJazz 130 nm CMOS Process". AZoNano. 29 April 2024. <https://www.azonano.com/news.aspx?newsID=24236>.

  • Chicago

    Chai, Cameron. "Kilopass’ NVM IP Completes Reliability Testing on TowerJazz 130 nm CMOS Process". AZoNano. https://www.azonano.com/news.aspx?newsID=24236. (accessed April 29, 2024).

  • Harvard

    Chai, Cameron. 2019. Kilopass’ NVM IP Completes Reliability Testing on TowerJazz 130 nm CMOS Process. AZoNano, viewed 29 April 2024, https://www.azonano.com/news.aspx?newsID=24236.

Tell Us What You Think

Do you have a review, update or anything you would like to add to this news story?

Leave your feedback
Your comment type
Submit

While we only use edited and approved content for Azthena answers, it may on occasions provide incorrect responses. Please confirm any data provided with the related suppliers or authors. We do not provide medical advice, if you search for medical information you must always consult a medical professional before acting on any information provided.

Your questions, but not your email details will be shared with OpenAI and retained for 30 days in accordance with their privacy principles.

Please do not ask questions that use sensitive or confidential information.

Read the full Terms & Conditions.