Chips Made of Layers Just Three Atoms Thick Could be the Future of Electronics

Stanford engineers show how to make semiconductors just three atoms thick in order to one day do things silicon chips can’t. Credit: Stefani Billings.

For more than 50 years, silicon chipmakers have developed innovative methods to switch electricity off and on, by producing the digital zeroes and ones to encode pictures, words, movies and other forms of data.

However, researchers have started to look for new materials beyond silicon that only occur in single layers only three atoms thick - much thinner than modern silicon chips - but they are able to control electricity more efficiently to create those digital ones and zeroes.

A research group led by Eric Pop, Stanford electrical engineering Associate Professor, has showed the way in which such atomically thin materials and electronics can be mass-produced. Will such materials be useful? Yes, due to the flexible and transparent nature of such thin materials, there is a high probability to produce electronic devices that cannot normally be produced using silicon.

What if your window was also a television, or you could have a heads-up display on the windshield of your car?” questioned Kirby Smithe, a graduate student on Pop’s group, talking about the electronic applications that the new materials might make way for.

Smithe, Pop, as well as co-authors Chris English and Saurabh Suryavanshi, who are graduate students in Pop’s lab, have published their research in 2D Materials, which is a journal devoted to research on atomically thin, two-dimensional devices.

Theory into Reality

The main aim of the research team was to develop a fabrication process to turn single-layer chips into practical. The first atomically thin material was discovered in the year 2004 when a team of researchers noticed that graphene (a material associated with the “lead” used in pencils) could be separated into layers with a single carbon atom thickness. This discovery led the scientists  to win the 2010 Nobel Prize in Physics.

However, the process used to make the discovery - lifting graphene layers off a rock using sticky tape - cannot be employed to fabricate next-generation electronics from ultrathin crystals.

Following the discovery of graphene, engineers set out to discover similar materials and, specifically, practical methods to design atomically thin switches into circuits.

Members of the Stanford research team made a huge progress due to its manufacturability. To begin with, they formed a single layer of material known as molybdenum disulfide, the name itself describing its sandwich-like structure, i.e. a sheet of molybdenum atoms packed between two sulfur layers. Prior research had demonstrated that molybdenum disulfide acted as a better switch by regulating electricity to produce digital zeroes and ones.

Scaling Up

The challenge was whether a molybdenum disulfide crystal that is large enough to form a chip could be manufactured. For this, a crystal approximately the size of a thumbnail should be produced, which may not seem very strenuous until the aspect ratio of the crystal is taken into account: a chip with a thickness of just three atoms but with the size of a thumbnail is similar to a single sheet of paper large enough to cover whole of the Stanford campus.

In order to produce such a sheet, the Stanford research team deposited three layers of atoms into a crystalline structure whose width is 25 million times greater than its thickness. Smithe accomplished this with ingenious fine-tuning of a manufacturing process known as chemical vapor deposition. This process essentially involves incineration of small amounts of molybdenum and sulfur until the atoms vaporize into soot. The atoms then get deposited on a “handle” substrate (i.e. glass or even silicon) as an ultra-thin crystalline layer.

Still, the research team’s work was not over as they were yet to design the material into electrical switches and perceive their operation. For this purpose, they used a recent advance led by English, who found out that exceptionally clean deposition conditions are mandatory to form better metallic contacts using the molybdenum disulfide layers.

The abundant new experimental data now accessible from the lab have also allowed Suryavanshi to develop precise computer models for the new materials and to start estimating the collective behavior of the materials when used as circuit components.

We have a lot of work ahead to scale this process into circuits with larger scales and better performance, but we now have all the building blocks.

Eric Pop, Associate Professor, Stanford University

Etching the Switches

While manufacturing chips, circuits are to be etched into the material. In order to exhibit the way in which a large-scale, single-layer chip manufacturing procedure might perform in the future, the research team employed standard etching tools to form the Stanford logo into their prototype. Furthermore, to have a little fun with a project they finished during a national election campaign, the team carved nanoscale portraits of the candidates of the two major parties into the atomically thin canvas.

Pop said the Stanford research team got an inspiration to do this from the researchers who created “nanobama,” - nanoscopic portraits of then President-elect Barack Obama - during the 2008 election cycle, using carbon nanotubes. Nanotubes promise to be another potential next-generation chip technology; the researchers who worked on that project made use of nanobama to establish the ability of technologists to produce unimaginably tiny objects.

Many people are interested in electronics because the technology is useful. But we hope nanotrump and nanoclinton can broaden the interest in research. Perhaps seeing portraits etched into a three-atom-thick canvas will inspire future researchers in ways we can’t even imagine yet.

Eric Pop, Associate Professor, Stanford University

Eric Pop is also a member of the Precourt Institute for Energy.

This work was partially supported by the Air Force Office of Scientific Research, the National Science Foundation, the Semiconductor Research Corporation and the Stanford SystemX Alliance.

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