Posted in | News | Nanoelectronics

Study Demonstrates Benefits of FD-SOI Technology for 20 and 28 nm Process Nodes

According to a joint research carried out by GLOBALFOUNDRIES, ARM. IBM, STMicroelectronics and other major semiconductors firms for producing 28 nm chips using fully depleted silicon-on-insulator (FD-SOI) process, planar semiconductor devices built on FD-SOI substrates are capable of delivering significant performance and power benefits when compared to CMOS devices fabricated on bulk-silicon substrates.

The findings also confirmed that the performance of the FD-SOI devices are capable of matching the performance assured by FinFET devices of 20 and 28 nm process technology nodes at the earliest. In the demonstration of silicon-calibrated simulations of intricate circuits comprising DDR3 memory controllers and ARM cores at the 28 nm node, the FD-SOI technology delivered superior performance over bulk CMOS technology even during the lowering of the power supply.

The FD-SOI technology delivers optimal performance equivalent to that of leaky general purpose technologies, at a leakage power and dynamic power lesser than that can be achieved by low-power technologies. The 28-nm FD-SOI circuit’s critical paths at 0.6 V were two folds faster than that of low-power technology and 50% faster than that of general purpose technology.

The FD-SOI technology consumes 40% less power by utilizing a lower power supply to achieve the equal target frequency. It allows the operation of all designs of digital devices such as SRAMS at a lower power supply. The technology also confirmed these benefits at the 20 nm node simulations.

At steady total power and based on design optimization efforts, the FD-SOI technology’s optimal performance was 12% to 30% higher than that of bulk technology specially designed for system-on-chip (SOC). It consumed 22% to 40% less power at consistent optimal operating frequency and its low-power performance was increased by 65%. The SOI Industry Consortium’s Executive Director, Horacio Mendez stated that the FD-SOI also delivers minimal production risk when compared to FinFET due to its capability to house planar designs.

Citations

Please use one of the following formats to cite this article in your essay, paper or report:

  • APA

    Chai, Cameron. (2019, February 12). Study Demonstrates Benefits of FD-SOI Technology for 20 and 28 nm Process Nodes. AZoNano. Retrieved on June 19, 2024 from https://www.azonano.com/news.aspx?newsID=23949.

  • MLA

    Chai, Cameron. "Study Demonstrates Benefits of FD-SOI Technology for 20 and 28 nm Process Nodes". AZoNano. 19 June 2024. <https://www.azonano.com/news.aspx?newsID=23949>.

  • Chicago

    Chai, Cameron. "Study Demonstrates Benefits of FD-SOI Technology for 20 and 28 nm Process Nodes". AZoNano. https://www.azonano.com/news.aspx?newsID=23949. (accessed June 19, 2024).

  • Harvard

    Chai, Cameron. 2019. Study Demonstrates Benefits of FD-SOI Technology for 20 and 28 nm Process Nodes. AZoNano, viewed 19 June 2024, https://www.azonano.com/news.aspx?newsID=23949.

Tell Us What You Think

Do you have a review, update or anything you would like to add to this news story?

Leave your feedback
Your comment type
Submit

While we only use edited and approved content for Azthena answers, it may on occasions provide incorrect responses. Please confirm any data provided with the related suppliers or authors. We do not provide medical advice, if you search for medical information you must always consult a medical professional before acting on any information provided.

Your questions, but not your email details will be shared with OpenAI and retained for 30 days in accordance with their privacy principles.

Please do not ask questions that use sensitive or confidential information.

Read the full Terms & Conditions.