Sep 2 2008
The Wafer Level Chip Scale Packaging (WLCSP) Forum today announced it will participate in the 2nd Electronic System-Integration Technology Conference (ESTC) in Greenwich, London, UK, from September 1 through 4, 2008. Forum Member companies will present original technical papers on WLCSP qualification and reliability issues. Papers from Forum Members include "Integration of Precision Passive Components on Silicon for Performance Improvements and Miniaturization", by Umesh Sharma, Ph.D., Harry Gee, Danny Liou, Ph.D., Phil Holland, and Rong Liu of California Micro Devices, to be presented on Tuesday, September 2, and "Shock Test Evaluation for Electronic Packages" to be presented by Laurent Barreau of STMicro on Thursday, September 4. The WLCSP Forum will host an informational booth in the Queen Anne Court exhibition hall.
WLCSP Forum Objectives
The WLCSP Forum's objectives are to promote the adoption of semiconductor devices using Wafer Level Chip Scale Packages, and to establish industry sponsored "best practices" for their utilization and strategies for migration to finer pitch WLCSP products. Members include industry leaders such as Amkor, Analog Devices, California Micro Devices, Cypress, Fairchild, FlipChip, GEM, Infineon, LORD, Maxim, National, Nokia, NXP, Pac Tech, STMicroelectronics, Umicore and Volterra.
WLCSP Forum Benefits
Benefits include: access to the Members' only section of the website to download Forum research, papers and application notes, access to the Forum "blog" to network with other Members and reach the whole CSP "ecosystem", regular Forum meetings, participation in working groups and surveys and an unlimited number of your company colleagues with full access to Forum benefits. Go to: http://www.wlcspforum.org/join_wlcsp.aspx.
Upcoming Events
The WLCSP Forum will be presenting papers, and will have a booth presence at the IWLCP Conference in San Jose, California, on October 15-16, 2008, organized by the SMTA. The WLCSP Forum will also organize a general meeting during this event.