Posted in | Nanoelectronics

SEMATECH’s Three-dimensional Enablement Program Includes Major Semiconductor Firms

SEMATECH has declared that its three-dimensional Enablement program has been joined by major semiconductor firms including Advanced Semiconductor Engineering (ASE), LSI, ON Semiconductor and Qualcomm.

The program is based at the University of Albany’s College of Nanoscale Science and Engineering (CNSE) and its existing members include CNSE, GlobalFoundries, Hewlett Packard, Hynix, IBM, Intel, Samsung and UMC. The joining of new members will strengthen the position of the program as an innovative and combined initiative for adopting low-cost three-dimensional TSV IC technologies.

The new members of the program will support the researchers of SEMATECH to add value to the forethought of the Enablement Center. Their contribution will include recognition of crucial demands for three-dimensional technologies, building of path determining abilities, EDA tools and proper test vehicles.

Dan Armbrust, President and CEO of SEMATECH, has stated that a study on three-dimensional technologies has been continuing for several years and the their company is determined to find out solutions for the problems encountered due to lack of proper standards. He thanked the new members and their supplier collaborators and added that the three-dimensional Enablement program can potentially minimize the hurdles to incorporating chips for leveraging three-dimensional technologies in high quantity production.

The benefits of three-dimensional incorporation include improved functionality, enhanced execution, reduced cost and compact chip size. These advantages have attracted several semiconductor companies to adopt three-dimensional integration. However lack of standardization and a restricted development of major methods have prohibited three-dimensional technologies from being utilized for mainstream manufacture.

During last December, SEMATECH, Semiconductor Industry Association (SIA) and the Semiconductor Research Corporation (SRC) started the three-dimensional Enablement program to promote industry regularity initiatives and technical requirements for heterogeneous three-dimensional incorporation. The program focuses on setting up required infrastructure for the total industry to adopt three-dimensional packaging technology for the latest sophisticated applications. The major focus is on building required technologies and stipulations in crucial segments like inspection, die handling, metrology, microbumping, bonding and thin wafer.

The program is open to global fabless, fab-lite and IDM firms, outsourced semiconductor assembly and test (OSAT) providers, and EDA process tool and materials providers. Additionally, the program and its participants are partnering with several firms, academic organizations, consortia, national labs and associations across the world.



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