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Collaboration to Provide Verification Platform for Integrated Circuits

Tanner EDA, a company that provides layout, design, and verification of mixed-signal and analog integrated circuits (ICs), and Berkeley Design Automation, a company that provides verification of nanometer circuits, are joining hands to provide the Analog FastSPICE (AFS) Platform from Berkeley Design Automation for the HiPer Silicon design suite manufactured by Tanner EDA.

Designers of mixed-signal, RF, and analog circuits require high circuit capacity and simulation performance with nanometer SPICE accuracy. The AFS Platform integrates well with the HiPer Silicon full-flow design suite to offer nanometer SPICE precision, which is 5 to 10 times more rapid than conventional single-core SPICE simulators. The integration will help Tanner EDA users to evaluate the complex analog/RF circuits using innovative nanometer CMOS technologies. Tanner EDA will showcase the integrated flow at the 48th Design Automation Conference (DAC) from June 6-8, 2011 in San Diego, California at the San Diego convention center.

The AFS Platform can be used to evaluate nanometer RF, analog, custom digital and mixed-signal circuits. Tanner EDA’s HiPer Silicon full-flow design suite provides designers with a comprehensive analog design flow from stages such as circuit simulation, schematic capture, physical layout and verification, and waveform probing.

HiPer Silicon comprises a new database for management and storage of simulation data. It also includes HiPerDevGen that delivers advanced device and structure generation to improve layout productivity. It comprises a complete remodeling of the waveform editor product called as W-edit to equip designers with a signal analysis platform instead of simple layout views.



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