Posted in | Nanosensors

Moortec Semiconductor Collaborate with Synopsys to Design IP for Nanometer Nodes

Synopsys, a company that offers software solutions and IP to design, verify and manufacture semiconductor devices, declared that Moortec Semiconductor, a provider of semiconductor integrated circuits and mixed-signal IP, has readily taped out its analog IP on 28HP and 40LP processes from TSMC. For the above purpose, Synopsys used its custom design solution and the interoperable process design kits (iPDKs) from TSMC.

The CMOS embedded temperature sensor IP offers a high-accuracy analog design and is suitable for use in thermal management systems that involve the use of high gate count digital ICs and complex geometry. Moortec used the custom solution offered by Synopsys, including the HSPICE and CustomSim circuit simulators, the Galaxy Custom Designer schematic and layout editor, StarRC extraction tools, and IC Validator/Hercules design rule checking and layout versus schematic (DRC/LVS).

The advanced temperature sensor IP blocks were manufactured by Moortec Semiconductor using standard logic techniques for 28-nm, 65 nm, and 40-nm geometries. It can be conveniently instantiated numerous times for temperature profiling across systems-on-chips (SoCs).

The Managing Director of Moortec Semiconductor, Stephen Crosher, stated that with the reduction in size of silicon structures, there is a demand for on-chip temperature control to optimize performance and improve IC longevity. He also added that it was required to reliably and promptly design the temperature sensor IP to work efficiently across various process nodes to meet the increase in demand.


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