Renesas Electronics Debuts Two New Series of Advanced Low Power SRAM Fabricated Using 110nm Process

Renesas Electronics Corporation, a premier supplier of advanced semiconductor solutions, today announced the release of two new series of Advanced Low Power SRAM (Advanced LP SRAM), the leading type of low-power-consumption SRAM, designed to provide enhanced reliability and longer backup battery life for applications such as factory automation (FA), industrial equipment, and the smart grid.

Fabricated using the 110-nanometer (nm) process, the new RMLV1616A Series of 16-megabit (Mb) devices and the RMWV3216A Series of 32 Mb devices feature an innovative memory cell technology that dramatically improves reliability and contributes to longer battery operation.

The recent demands for highly secure and reliable user systems are driving increased demand for highly reliable SRAM, which is used to store important information such as system programs and financial transaction data. The prevention of soft errors (Note 1) caused by alpha rays and cosmic neutron rays is a significant issue. Typical measures to deal with this problem include embedding an error correcting code (ECC) circuit in the SRAM or user system to correct any soft errors that occur. There are limits, however, to the error correction capabilities of ECC circuits. For example, some cannot correct simultaneous errors affecting multiple bits.

Renesas’ Advanced LP SRAM devices feature exclusive technology in their memory cells that achieves soft error resistance (Note 2) over 500 times that of conventional Full CMOS memory cells (Note 3). This makes it desirable for use in fields requiring high reliability, including FA, measurement devices, smart grid-related devices, and industrial equipment, in addition to many other fields, such as consumer devices, office equipment, and communication devices.

Highlights of the new RMLV1616A Series and RMWV3216A Series features:

(1) Renesas’ exclusive Advanced LP SRAM technology for dramatically better soft error resistance and enhanced reliability

In the Renesas Advanced LP SRAM structure, a stacked capacitor (Note 4) is added to each memory node (Note 5) within the memory cells. This configuration suppresses the generation of soft errors to a level that is effectively soft error free (Note 6). In addition, the load transistor (P-channel) of each SRAM cell is a polysilicon thin-film transistor (TFT) (Note 7) that is stacked on top of the N-channel MOS transistor formed on the silicon. Only the N-channel MOS transistor is formed on the silicon substrate below. This means that no parasitic thyristors are formed in the memory area and theoretically makes latch-up (Note 8) impossible. Therefore, the Advanced LP SRAM is well suited to applications requiring high reliability, such as FA, measurement devices, smart grid related devices, traffic systems, and industrial equipment.

(2) Reduction of standby current to less than half the earlier level for longer backup battery service life

The standby current of the new RMLV1616A Series and RMWV3216A Series is only 0.5 microamperes (μA) (typical) for 16 Mb devices and 1 μA (typical) for 32 Mb devices (Note 9). These low current consumption levels are less than half the levels of comparable earlier Renesas SRAM products (Note 10), making it possible to extend the service life of backup batteries. The minimum power supply voltage when retaining data is 1.5 V, lower than the 2.0 V of comparable earlier Renesas products. This helps customers designing systems that retain data using battery power.

(3) Package lineup

The 16 Mb RMLV1616A Series is available in three packages: 48-ball FBGA, 48-pin TSOP (I), and 52-pin μTSOP (II), allowing customers to select the package that best matches their application. The 32 Mb RMWV3216A Series is available in a 48-ball FBGA package.

Refer to the separate sheet for the main specifications of the new RMLV1616A Series and RMWV3216A Series.


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