Graphene has attracted major interest from companies like IBM and Samsung as a platform for electronics beyond complementary metal–oxide–semiconductor (CMOS) technology, mainly due to its electron mobility, which could be theoretically as high as 200,000 cm2/Vs. By way of comparison, this figure is around 1,400 cm2/Vs in silicon, and 77,000 cm2/Vs in indium antimonide, the highest known electron mobility in a conventional semiconductor.1
What this means in simple terms is way beyond “high-speed” electronics - phenomenally, unbelievably high-speed electronics. While that number is theoretical, and in the real world we will see a range of numbers approaching that level, it still represents an opportunity to increase the speed of electronic devices by up to a factor of 1,000. That’s a jump from gigahertz to terahertz. No wonder people are excited.
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Graphene’s Achilles’ Heel
There is a caveat to this optimism, explained in “A Roadmap for Graphene”2, an article authored by one of Manchester’s Nobel Prize winners along with researchers from Texas Instruments, Samsung and others:
“It is unlikely that graphene will make it into high-performance integrated logic circuits as a planar channel material within the next decade because of the absence of a bandgap.”
This translates to a poor on/off ratio, i.e. the difference between the conductivity of the device when it is switched on and off. If the ratio is too low, a transistor will still conduct electrons even when switched off. A device with lots of transistors (an Intel Haswell microprocessor has 1.4 billion) would therefore waste huge amounts of power even when switched off and be impractical as anything other than a heater.
This limits graphene’s short-term usefulness in logic devices, although there are plenty of other electronic applications which I’ll discuss in a later article.
The potential reward for success in microelectronics is so great, however, that the bandgap problem has not dissuaded some of the worlds largest electronics companies from pursuing R&D into graphene-based devices. Samsung and IBM are both very active in this area.
IBM vs Samsung
IBM are already claiming to have built the words most advanced graphene-based chip3, which out performs other graphene chips by a factor of 10,000. The reason for this is that graphene isn’t a fantastic material from a CMOS fabrication perspective. It adheres quite weakly, and of course it can be easy to damage a one-atom-thick layer when you are depositing and etching other materials in close proximity.
So while it is possible to deposit graphene to make a graphene channel for a transistor, all the subsequent process steps tend to damage it to a point where it confers no advantage.
IBM’s breakthrough idea was to deposit the graphene last. Rather than trying to deposit it in situ, they grow it by chemical vapour deposition (CVD) on copper foil. The copper is then dissolved away, leaving a layer of graphene that can be ‘scooped up’ by the wafer.
Samsung have a different approach, with a technique that can grow high-quality single-crystal graphene on silicon wafers4. This was modestly claimed to be “one of the most significant breakthroughs in graphene research in history.”
As with the IBM method, the technique allows the production of graphene sheets for microelectronics use. Creating workable devices seems to be some way off, as the resistivity seems a little on the high side - but it is early days, and Samsung seem to be more concerned with flexible devices and screens for obvious reasons.
There is more to integrated circuits than transistors, and graphene’s high electronic mobility could see it being used in more mundane applications such as conductors, provided the CMOS circuitry can keep up – and provided it is cheaper and easier to work with than existing materials.
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Is Silicene A Credible Challenger to Graphene?
While we wait for the problem of creating a bandgap in graphene to be solved, another two dimensional challenger has emerged in the shape of silicene. The first silicene transistors were recently reported5, and, unlike graphene, this material does have a bandgap, although of the sort that many CMOS engineers would regard with some degree of suspicion.
Another potential advantage for silicene is that the semiconductor industry has invested the past sixty years in understanding every aspect of silicon, not carbon. In theory at least, this should mean that the process changes required are less drastic.
While that all looks positive, silicene is difficult to produce and handle compared to graphene. It is extremely unstable in air, making handling an issue, and the only experimental transistor produced so far degraded in minutes.
This may be manageable if the silicene can be sandwiched between layers of other two dimensional materials to help protect it, but that would necessitate the development of production processes for a whole range of new materials. Other new 2D materials such as germanene face similar problems.
A Two Dimensional Two Horse Race
Given the problems associated with the use of both graphene and its challengers in microelectronics, it is unlikely we will be seeing these screamingly fast devices any time soon.
The International Technology Roadmap for Semiconductors (ITRS) doesn’t see any unsolvable issues for silicon before 2020, so any work on graphene microelectronics is going to be a long-term game. Given the amount of research going on, my bet would be on a combination of 2D materials providing the breakthrough that is needed.
Or A Dark Horse?
But all of the above presupposes that we continue making integrated circuits in the same way we have always done. The roadmap for semiconductors was determined by our inability to control the properties of early transistors6, which meant that the industry had to engineer around the material limitations.
The most likely outcome is that graphene will have to get along with silicon, which seems to have spent the last twenty years avoiding hitting the red brick wall at the end of the roadmap due to the creativity of the microelectronics industry.
But there are a variety of other nano enabled technologies under development, from spintronics to organic transistors7. So ‘beyond CMOS’ is by no means limited to ‘beyond CMOS but based on current CMOS technology’.
History shows us that technology doesn’t always follow a linear roadmap, and while it would be foolish to bet against CMOS, there is an outside chance that by 2025 we will be seeing some seismic shifts affecting the entire microelectronics industry.
- "Intrinsic and Extrinsic Performance Limits of Graphene Devices on SiO2" - J. H. Chen, C. Jang, S. Xiao, M. Ishigami, M. S. Fuhrer, Nature Nanotechnology, March 23, 2008, or Science Daily press report
- "A Roadmap for Graphene" - K. S. Novoselov et al, Nature, October 10 2012
- "Graphene Radio Frequency Receiver Integrated Circuit" - S.-J. Han et al, Nature Communications, January 30 2014
- "Samsung Researchers Claim Graphene Breakthrough" - Telegraph
- "Graphene’s Cousin Silicene Makes Transistor Debut" - Nature News
- "The Invention of the Transistor" (PDF) - M. Riordan et al, Reviews of Modern Physics, 1999
- "Overview of Beyond-CMOS Devices and A Uniform Methodology for Their Benchmarking" - R. E. Nikonov & I. A. Young, ArXiv Preprint submitted February 2013
Tim is a serial technology entrepreneur focussing on nanotechnology and graphene.
A former engineer at the European Space Agency, his business background ranges from venture capital to running public companies to advising governments and international organisations.