There has been much research on the fabrication of nanochannels using local oxidation and consequent etching of silicon surfaces. Although this technique has been extensively demonstrated, it has the potential to obstruct the material removal process by generating a deposit over the etched area.
Image Credit: Foto-Ruhrgebiet/Shutterstock.com
Direct etching can be achieved without using any extra procedures if the oxide layer is removed by utilizing the tip alone. Previous research employed a catalytically active platinum-coated atomic force microscope (AFM) probe for material removal and displayed a direct etching approach over silicon without the development of oxide.
Aside from that, techniques like ion-beam sculpting, which uses low- and high-energy ion beams to create structures on the atomic scale, are useful.
Material removal on an atomic scale could result from a mix of actions like shearing and extrusion. Due to the compression of the substrate atoms by the tool edge atoms during the shearing process, the substrate atoms are forced upwards, generating the chips. On the other side, extrusion causes plastic deformation below the machined surface, and only a few chips are generated as a result of the extrusion process.
Since silicon is so widely used in the semiconductor sector, it should be subjected to more accurate and realistic material removal. Aside from that, silicon in the (100) orientation is preferable for structure construction research because the Si/SiO2 state density is lower than in the other orientation, resulting in higher carrier mobility when employed for nanodevice fabrications.
The research gap here is the minimal depth or height of atomic patterns that can be generated by employing AFM-based electrochemical and mechanical scratching procedures with an AFM tip to realize structure manufacturing.
Apart from Si, materials including highly oriented pyrolytic graphite (HOPG), gold, silicon carbide, and van der Waals materials like transition metal dichalcogenides (TMD) could be used in atomic-scale manufacturing experiments. As a first step, researchers demonstrated that a single atomic layer removal across HOPG may be done in the newly published study.
A comprehensive examination of oxide production on a silicon surface with platinum-coated while scratching when given a tip bias and material removal using a diamond tip, employing AFM, is presented in research published in the MDPI journal micromachines.
Commercially accessible AFM equipment is used to execute the electrochemical etching technique. Including both contact mode for machining and amplitude modulation for imaging, a silicon-based AFM probe equipped with conductive PtIr5 and single-crystal diamond probes is used.
The schematic representation of an AFM-based electrochemical etching apparatus with a relative humidity control environment can be found in Figure 1.
Figure 1. Schematic diagram of AFM-based electrochemical etching apparatus with a relative humidity control environment. Image Credit: Mathew, et al., 2022
Results and Discussion
In the presence of oxygen, the production of oxidation on the silicon substrate is well-known. In interaction with the adsorbed water layer on the silicon surface, the tip generates a water meniscus. Many parameters, like tip velocity, applied voltage, humidity, and applied tip force, can be used to influence the oxide deposition.
The oxide layer typically has a thickness of 1.5 to 2 nanometers. Local anodic oxidation (LAO) occurred when lines were scratched across the bare silicon substrate in normal room circumstances with a humidity of 36%. The lines were drawn with a force of 0.1 μN. This force is the smallest that can be applied to a silicon substrate while utilizing Au-coated and platinum-coated AFM tips to fabricate nanostructures.
Various lines are drawn with multiple force values ranging from 1 nN to 2 μN, as shown in Figure 2, to identify an optimal force value with the current set-up, employing a 7 V tip bias and 1 μm/s tip velocity.
Figure 2. The lines scratched with different tip forces: Toplines are the forces ranging from 1 nN to 90 nN with an increment of 10 nN. Middle lines are the forces ranging from 0.1 μN to 1 μN with an increment of 0.1 μN. The bottom lines are the forces ranging from 1.1 μN to 2 μN with an increment of 0.1 μN. Image Credit: Mathew, et al., 2022
Figure 2 shows that the lines are very well defined and controlled for force values ranging from 0.1 μN. Figure 3 compares the consequences of oxide production at low and high relative humidity.
When the speed is low, the oxidation thickness is greater and broader, as shown in Figure 3A. The deposit’s height has risen to just above 4 nm at 200 nm/s, and it has increased to just above 1 nm at faster speeds. This is owing to the different speeds of the contact points between the tip and the substrate atoms.
Even though differing tip velocities cause inconsistent increments and decrements in height and depth, VT at 1 μm/s causes LAO with a constant increase in height and width until 9 V, after which a decline in both variables may be seen at 10 V, as illustrated in Figure 3B, C.
Figure 3. The lines are drawn on the surface under different humidity conditions: (A) The formation of oxide deposits with different tip velocities and voltage (B) The height vs. tip bias and (C) Width vs. tip bias of the lines scratched on the silicon surface. FT = 0.1 μN. RH is 36% (D) The lithographical lines drawn on the substrate with different voltages with a relative humidity of 75% and VT = 1 μm/sec. FT = 0.1 μN (E) The height vs. tip bias and (F) width vs. tip bias characteristics. Image Credit: Mathew, et al., 2022
The different lines painted on the silicon surface with a humidity range of 75–90% are shown in Figure 3D. It can be seen in Figures 3E and F that the width and height of the deposits on the surface are consistently increasing.
Figure 4 shows some of the letters drawn on the surface in a humid atmosphere with a RA of 75 percent. The letters are developed and distinct, and their thickness is consistent throughout. To summarise, LAO occurs with platinum-coated conductive tips and is influenced by tip velocity, tip bias, tip force, and humidity levels.
Figure 4. The intrinsic patterns fabricated over silicon substrate: (A) Letter ‘P’, and (B) UCD logo. FT = 0.1 μN and tip bias of 7 V, RH = 75%, VT = 1 μm/s. Image Credit: Mathew, et al., 2022
Figure 5 displays the contact mode scanned image of silicon in a 2 × 2 μm area, with a force of 2 μN. This force is active since it is used for employing nanolithography over hard substrates like silicon using single crystal diamond tips.
Figure 5. The contact mode scanning over silicon surface using a single crystal diamond tip: (A) The polished 2 × 2 μm area by contact mode scanning with a force of 2 μN. (B) The accumulation of debris on the sides and the (C) line profile show a depression of 1.89 nm. Tip bias: 0 V and RH ~75%. Image Credit: Mathew, et al., 2022
Figure 6 displays the lines scratched on this cleaned area with a marginally larger FT of 4 μN and diverse velocities ranging from 0 V to 10 V, with a VT of 1 μm/s. In the figure, stable and reliable material removal is attained for lower voltages to 6 V.
Figure 6. The scratched lines and the line profile with different tip voltages over a silicon substrate with a diamond tip: (A) The scratched lines over silicon using a single crystal diamond AFM tip with different tip voltages ranging from 0 V to 10 V with constant velocity (B) The line profile of the trenches (non-flattened). FT = 4 μN and the humidity is ~75%. Image Credit: Mathew, et al., 2022
A concentric square is scraped over the substrate under normal room circumstances (room humidity 25–30 %), as illustrated in Figure 7B, to learn more about the impact of material depth in various directions.
Some of the lines in Figure 7B are more noticeable, while others are less than that. Due to the obvious tip geometry, this is the reality. Figure 7A shows the SEM study of the diamond tip before scratching. Different sides of the analysis are shown as numbers in the figure for ease of understanding.
Figure 7B shows the same numbers as Figure 7A, representing the different sides of the AFM tip that pass through the scratching procedure, as indicated by the arrows. The lines are horizontally scanned with side 1 of the tip and retraced with side 3 of the tip when scanning is done at a 0° angle.
As shown by the line profile originating from the square’s center, depicted in Figure 7C, the square’s starting and ending points are substantially deeper.
Figure 7. Analysis of different depth rates around the etched concentric square: (A) The SEM image of the diamond tip before scratching the silicon surface (B) The concentric square etched on the surface indicating the direction of tip motion and the sides of the tip with which the lines were in contact (C) The line profile along with the starting/endpoint, (D) The line profile along the rightward horizontal section where the AFM tip side 1 was in contact (E) The line profile along the upward vertical side where AFM tip side 2 was in contact (F) The line profile along the leftward horizontal plane where the AFM tip side 3 was in contact (G) The line profile along the downward vertical side of the concentric square where the AFM tip side 4 was in contact. The inset figures on the line profile show the representation of the lines on each side of the square. Image Credit: Mathew, et al., 2022
In the vertical direction, the materials are removed to a depth of less than 1 nanometer, falling as low as 0.32 nm in Figure 7E.
Experiments are carried out on a silicon substrate that has been dipped in a 10% HF solution to remove the natural oxide layer. The results are comparable to those obtained over bare silicon when the studies are carried out by drawing lines on the surface using a platinum-coated conductive tip, as illustrated in Figure 8.
Figure 8. The LAO formation over HF treated silicon: (A) The formation of oxide deposits over HF treated silicon with different tip voltages ranging from 0 V to 10 V (B) The height vs. tip voltage characteristics and (C) The width vs. tip bias graph. FT = 0.1 μN, VT = 1 μm/s and RH ~26%. Image Credit: Mathew, et al., 2022
As illustrated in Figures 8B and C, the height and width of the oxide deposits are significantly more constant and regulated over the HF treated surface.
Material removal is done when the area is submitted to lithography using the diamond tip, on the other side. Figure 9A depicts the scratching of HF-treated silicon with three force values and voltages at 1 μm/s tip velocity, whereas Figure 9B depicts 3D imaging of the same surface. The material removal is accomplished directly over the substrate, as shown in the images.
Figure 9. Scratching tests on HF treated silicon: (A) The etched lines on the silicon surface with different forces and voltages (B) The 3D image of the same where the etched depth can be seen increasing with higher force (C) The depth vas voltage graph showing the influence of different tip force. Image Credit: Mathew, et al., 2022
The impact of varied force values can be seen in Figure 9C. Depths as near to a single atomic layer can be attained with reduced force.
The effects of various factors on structure building over silicon (100) substrate employing two distinct AFM tips are investigated in depth. On the atomic scale, it has been discovered that with the right parameters, improved fabrication and material removal can be accomplished. Instead of removing material, a platinum-coated AFM tip depositions it on the substrate.
Furthermore, material removal with a diamond tip near the atomic scale is proven, as a depth of 0.32 nm, or around three silicon atoms, is achieved. Contact mode scanning can sweep the produced trash to the edges.
Since a smooth and uniform LAO is established, the relative humidity has a significant impact on the structure manufacturing. Material removal over bare silicon with a native oxide layer is found to be negatively associated with some depositions/surface damage, while it is uniform and clean over HF treated silicon. The diamond tip allows for direct material removal over bare silicon, whereas the platinum-coated tips necessitate a two-step technique.
This research lays the groundwork for future nanodevice fabrication, with applications ranging from the development of downsized electronic components to the mass manufacture of atomic-scale IC components, paving the way for the next generation of manufacturing.
Mathew, P. T., Han, W., Rodriguez, B. J., Fang, F. (2022) Structure Fabrication on Silicon at Atomic and Close-To-Atomic Scale Using Atomic Force Microscopy: Implications for Nanopatterning and Nanodevice Fabrication. Micromachines, 13(4), p. 524. Available Online: https://www.mdpi.com/2072-666X/13/4/524/htm.
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