Cadence Design Systems, Inc. today unveiled Cadence® Innovus™ Implementation System, its next-generation physical implementation solution that enables system-on-chip (SoC) developers to deliver designs with best-in-class power, performance and area (PPA) while accelerating time to market.
Synopsys, Inc. today announced that its IC Compiler™ II place and route solution has enabled Toshiba to accelerate tapeout of an advanced 40-nanometer (nm) system on chip (SoC). The impressive speed-up and superior QoR delivered by IC Compiler II enabled Toshiba to achieve higher designer productivity and better device performance.
The Laboratory of Advanced Materials, belonging to the University of Alicante's department of Inorganic Chemistry, has developed a technology that allows the preparation of artificial methane hydrates. The research has been published by the prestigious scientific journal Nature Communications.
In nature, pores can continuously control how a living organism absorbs or excretes fluids, vapors and solids in response to its environment; for example, tiny holes invisible to the naked eye called stomata cover a plant's leaves and stems as gated openings through which oxygen, carbon dioxide and water vapors are transported in and out during photosynthesis and respiration. And some scientists have proposed that micropores in the tissues of the air sacs of human lungs can open or close to modulate fluid flow based on changes in air pressure or inflammation.
Xilinx®, Inc. today announced immediate availability of the winter 2015 edition of its award-winning user magazine, Xcell Journal. The cover story for the 90th issue of Xcell Journal takes a system-level look at Xilinx's newly unveiled UltraScale+™ product portfolio of FPGAs, 3D ICs, and MPSoCs, and how the portfolio yields a 2-5X greater system level performance-per-watt advantage over 28nm devices.
Cadence Design Systems, Inc. today announced that Global Unichip Corporation (GUC) achieved first-silicon success integrating tri-band analog front-end (AFE) intellectual property (IP) with WiGig (IEEE 802.11ad), enabling integration of digital logic and analog monolithic die in an advanced 28nm complementary metal-oxide semiconductor (CMOS) process.
Leading semiconductor test equipment supplier Advantest Corporation will demonstrate its latest TAS7500 THz spectroscopy and imaging systems and solutions at the annual PITTCON Conference and Expo, to be held in at the Memorial Convention Center in New Orleans, LA from March 9-12, 2015.
Supporting Governor Andrew M. Cuomo's vision for New York State's continued leadership in the global high-tech economy, SUNY Polytechnic Institute’s Colleges of Nanoscale Science and Engineering (SUNY Poly CNSE) and Israel’s Metro450 consortium today jointly announced plans to develop and produce Standard Calibration Wafers (SCW) for use with 300mm and 450mm metrology and process tools. The initiative will generate $2.9 million in investment and support more than 100 jobs in New York and Israel.
A new simple tool developed by nanoengineers at the University of California, San Diego, is opening the door to an era when anyone will be able to build sensors, anywhere, including physicians in the clinic, patients in their home and soldiers in the field.
We have developed a spin-transfer torque magnetoresistive random-access memory (STT-MRAM) circuit for use in high-performance processors and system-on-a-chip (SoC) integrated circuits, implementing a 1-Mb class of new magnetic materials. The newly developed memory circuit allows low-power, high-efficiency, high-speed performance in energy-efficient magnetic tunnel junction (MTJ) memory.
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