Rockchip Utilizes Chartered's 65nm Process and Synopsys' Technology and Services Portfolio For Tapeout of Next-Generation Multimedia SoC

Fuzhou Rockchip Electronics Company, Ltd., Synopsys, Inc. and Chartered Semiconductor Manufacturing Ltd. today announced that Rockchip has achieved first-time silicon success on its next-generation multimedia system-on-a-chip (SoC), using a combination of Synopsys' tools, intellectual property (IP) and services with Chartered's 65-nanometer (nm) manufacturing technology. The RK 28 multimedia SoC, Rockchip's first mass-production 65nm chip designed in China and targeted primarily for the China market, is an application processor for mobile handheld devices. The RK28 chip was designed with Synopsys' full RTL-to-GDSII flow using best-in-class technology from the Galaxy Implementation and Discovery Verification Platforms, as well as DesignWare IP, and implemented in Chartered's advanced low-power (65nm LP) process.

"The mobile applications served by our customers require chips that can meet stringent low-power specifications without compromising performance, and our multimedia RK28 SoC delivers on both fronts," said Feng Chen, chief marketing officer of Rockchip. "Our EDA and manufacturing partners played key roles in the success of our program. Our ability to reach design closure within our market window then rapidly move from tapeout to production silicon validates the choices we made with Synopsys and Chartered."

Since the 65nm RK28 represented Rockchip's first design at a new technology node, production-proven technology and knowledge sharing among the parties were essential to project success. The design took advantage of Synopsys' IC Compiler with Zroute technology to exceed its 500MHz performance target, while employing advanced low-power design techniques such as multi-voltage and power gating to reduce power consumption. The production-proven VMM verification methodology and VCS functional verification solution were used to verify Rockchip's design. The RK28 chip also integrates silicon-proven Synopsys DesignWare IP, including USB 2.0 PHY, USB HS OTG Controller and SD/MMC Host Controller. Design consultants from Synopsys Professional Services worked closely with Rockchip's engineers throughout the project, merging critical skills and expertise to mitigate project risks and address schedule pressures. The implementation of the design in Chartered's 65nm LP process enabled the chip to achieve target power, performance and area goals with first silicon, and quickly ramp to production volume.

"At Chartered, we understand our customers need technology and solutions with low risk and high yield to speed time to market, and we are pleased to see our collaboration with Rockchip and Synopsys achieve first-pass silicon success," said Dr. Liang-Choo "LC" Hsia, senior vice president of technology development at Chartered. "The Rockchip-Synopsys-Chartered collaboration demonstrates how a strong foundation can support companies on the leading edge of design, especially those in the consumer entertainment and mobile applications."

"Rockchip joins a growing list of innovative chip developers that are taking advantage of Synopsys' broad portfolio of tools, IP and services to accomplish their aggressive design goals with efficiency," said John Chilton, senior vice president of marketing and strategic development at Synopsys. "Our collaboration with Rockchip and Chartered demonstrates our commitment to serve customers in China and the rest of the world with solutions that accelerate tapeout and enhance manufacturability."

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