May 31 2013
Berkeley Design Automation, Inc., provider of nanometer circuit verification, today announced the availability of the Analog FastSPICE Mega (AFS Mega™) silicon-accurate circuit simulator for memories and other mega-scale array-based circuits such as CMOS image sensors.
AFS Mega extends the company’s foundry-certified Analog FastSPICE™ Platform with the capacity, performance, and features required for mega-scale array verification and characterization into FinFET-based process nodes.
Mega-scale arrays dominate the silicon area in most nanometer-scale integrated circuits (ICs) including system-on-chip ICs with embedded SRAM, memory ICs (e.g., SRAM, flash, DRAM, and ROM), and CMOS image sensors (CIS). All such applications are extremely cost and power sensitive, requiring six-sigma bit-cell yield. Yet design teams have had to settle for digital fastSPICE tools that have several percentage point inaccuracy in order to simulate full circuits at the transistor level. Using inaccurate simulation requires building in at least as much circuit margin to ensure meeting specifications in silicon or risking extremely expensive respins. The move to sub-20 nanometer and 16 nanometer FinFET-based process nodes with multiple patterning and increased variation and device noise exacerbates the problems.
Analog FastSPICE Mega is a silicon-accurate circuit simulator for circuits with mega-scale arrays. Unlike existing digital fastSPICE tools that sacrifice accuracy via partitioning, event simulation, netlist simplification, and table-lookup models, and other shortcuts, AFS Mega delivers foundry certified accuracy on up to 100M-element arrays. AFS Mega features unique capabilities to robustly, accurately and quickly handle pre-layout and post-layout mega-scale arrays; providing the silicon-accurate time, voltage, frequency and power resolution, and doing so faster than legacy digital fastSPICE tools. And unlike legacy tools that require extensive tuning – often for each block, each unique configuration, and each set of unique operating conditions – with its superior accuracy, AFS Mega does not require any such tuning.
“Mega-scale arrays now dominate many leading-edge ICs, but it has been impossible for companies to accurately verify or characterize them prior to silicon,” said Ravi Subramanian, President and CEO of Berkeley Design Automation. “Delivering the first silicon-accurate circuit simulator for such circuits is an important milestone for the entire semiconductor industry. It will enable markedly lower cost and lower power circuits with far less work and risk.”
“Designing at advanced FinFET-based process nodes places stringent new requirements on simulation tools for memory designers,” said Sreedhar Natarajan, TSMC Director, Memory Solutions Division, Design and Technology Platform. ”Silicon-accurate memory performance-and-power characterization, including all physical effects, is now essential to ensure meeting the specifications of the ultra-complex chips that will be built in these advanced nodes. FastSPICE tools that sacrifice accuracy are no longer adequate, and yet we cannot give up on simulation performance or capacity. Now we really do need it all: silicon accuracy, maximum performance and mega-scale capacity.”
The Analog FastSPICE Platform provides faster circuit verification for nanometer analog, RF, mixed-signal, and custom digital circuits certified at TSMC 20nm. For circuit characterization, the AFS Platform includes comprehensive silicon-accurate device noise analysis and delivers near-linear performance scaling with the number of cores. For large circuits it delivers >10M-element capacity, near-SPICE-accurate simulation, and accurate mixed-signal simulation. Available licenses include AFS circuit simulation, AFS Mega, AFS Nano, AFS Transient Noise Analysis, AFS RF Analyses, AFS Co-Simulation, AFS AMS, and ACE
Source: http://www.berkeley-da.com/