Mar 12 2008
IMEC reports a variability-aware modeling (VAM) flow that analyzes process variability of sub-45nm technologies which enables designers to optimize their system design for timing, energy and yield versus expected application load. The flow assesses the impact of process variations and degradation effects of sub-45nm technologies on the system performance by giving valuable information to the designer. IMEC's VAM flow can hook into commercial design for manufacturing (DFM) tools and has been validated on industrial process technology data and IP cores.
Leveraging on IMEC's leading expertise in advanced sub-45nm process technology and system design technology, IMEC developed the VAM flow for percolating information on process variability of sub-45nm technology from the transistor up to the system level. VAM enables IP block and system designers to make predictive assessment of architecture design options and to identify design bottlenecks before manufacturing. In this way, functional problems and parametric uncertainty of their designs caused by process and material variability of deep sub-micron technologies can be overcome.
IMEC validated the VAM flow by propagating commercial TSMC 45nm variability data to estimate performance and energy for an ARM926 processor. The VAM output was used to optimize the processor before manufacturing using a commercial toolflow.
"Up to now, most variability characterization work is done internally at IDMs on own technology and IP blocks. However, with the move to fabless and fablite companies, we want to bridge the gap between foundry and fabless companies on design-level impact of using most advanced semiconductor technologies;" said Rudy Lauwereins, Vice President Nomadic Embedded Systems at IMEC". "To this end, we invite IDMs, fabless system companies, fabless digital IP providers and foundries to collaborate within our Technology-Aware Design program to develop the necessary tools for designing reliable systems with variable and unreliable components. IMEC's program is compatible with confidentiality constraints for high value proprietary IP blocks."
Qualcomm and Samsung are currently the 2 first top-tier industrial partners in IMEC's Technology-Aware Design program. IMEC has recently also signed a cooperation agreement with SI2 to pursue alignment with industry standardization effort for SSTA.