Flexible Pin Configuration Supports Diverse DRAMs and Improves Throughput

Advantest Corporation today announced availability of its new T5385 memory test system for dynamic random access memory (DRAM) wafer test, offering a parallel test capability of 768 devices -- the highest in the industry, and twice the capability of the company's previous model. The T5385 will be available beginning August 2009.

Demands at wafer level test continue to increase for both improved performance and a lowered cost-of-test. Advantest's new T5385 addresses these issues and improves efficiency per device while scaling even higher in parallelism. The T5385 not only boasts an unrivaled 768-DUT parallel test capacity, but also delivers 533Mbps capability for increased throughput and lowered test costs, making it an ideal solution for high-volume wafer fabs. The new tester is equipped with a flexible pin configuration that supports diverse DRAM devices, and allows tester pin resources to be optimally allocated for efficiency, reduced touchdowns and improved throughput. The T5385 also delivers Known Good Die (KGD) for consumer devices, to greatly improve yields for tomorrow's Low Power DDR2 (LPDDR2) and DDR3 multi-die and stacked devices. Enabled by hardware and software advances, the T5385 offers a high-speed memory repair analysis (MRA) system for DRAM and Flash memory wafer test that greatly reduces test time.

-- New Tester Improves Throughput in Wafer Test Process

DRAM memory chips used in today's computers and other electronics deliver faster processing speeds, higher data storage volumes, and more efficient power consumption than previous generation devices. To enable these gains, the semiconductor industry is aggressively migrating to smaller process nodes that allow more chips and greater densities to be produced from each wafer. Throughput has therefore become a critical issue in DRAM wafer test, with chipmakers demanding significant gains to increase productivity. Advantest's new T5385 delivers an unrivalled parallel test capability and flexible pin configurations that significantly improve throughput in the wafer test process.

-- Features and Benefits

  • Industry's highest DRAM wafer test parallel capability of 768 devices - The T5385 boasts a parallel test capability of 768 devices -- twice that of Advantest's previous model, the T5383, and the highest in the industry. Massively parallel testing reduces touchdowns and helps to lower test costs significantly in high-volume wafer fabs. The new tester is also equipped with a flexible pin configuration that supports diverse DRAM devices, allowing tester pin resources to be optimally allocated for greater efficiency.
  • High-Speed MRA - Enabled by hardware and software advances, the T5385 offers a high-speed MRA (Memory Repair Analyzer) for DRAM and flash memory wafer test that reduces test time by 30%, compared to the previous model.
  • Reinforced Flash Memory Test Capability - The T5385 also supports flash memory wafer test. It boasts a proprietary tester-per-site architecture optimized for flash memory, contributing to reduced test times.
  • T5385ES Memory Test System for DRAM R&D Also Available - Designed for engineering use, the smaller T5385ES offers all the functional and performance qualities of the T5385. Engineers can easily perform evaluation and characterization, and test programs developed on the T5385ES can be seamlessly transferred to the T5385, accelerating DRAM development processes.

With the announcement of the T5385ES and T5385 test systems, covering DRAM and flash memory wafer test from development to high-volume production, Advantest again affirms its commitment to providing best-in-class test solutions.

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