HDMI PHY IP Available in More than 10 Processes from 90-nm to 40-nm

Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of high-quality DesignWare® High-Definition Multimedia Interface (HDMI(TM)) 1.4 transmitter (Tx) and receiver (Rx) digital controllers and PHY IP solutions that are compliant to the standard specification.

With full support for new features of the HDMI 1.4 specification including HEAC 3D formats, real-time content signaling, 4K x 2K resolution and 10.2 Gbps aggregate bandwidth, the DesignWare HDMI IP enables designers to quickly incorporate differentiated functionality into their digital TV (DTV) and home theater applications with less risk and improved time-to-market.

With designers incorporating networking capabilities in next-generation home entertainment devices, the HEAC block in the DesignWare HDMI 1.4 solution helps simplify the connectivity between internet-enabled digital home devices by enabling the transfer of Ethernet and audio frames through a single HDMI cable. The DesignWare IP for HDMI 1.4 also incorporates all 3D formats, which allows device manufacturers to heighten the viewing experience by supporting 3D techniques such as full side-by-side, half side-by-side and frame alternative. The real-time content signaling capability enables televisions to automatically optimize the picture setting with no user intervention. Support for 4K x 2K resolution delivers up to four times the resolution of 1080p, providing the same resolution as state-of-the-art digital cinema systems.

"With a strong focus on innovation, DisplayLink continues to incorporate the latest technologies into our leading network display products," said Jonathan Jeacocke, vice president of engineering at DisplayLink. "When we wanted to incorporate HDMI IP into our SoC, we turned to Synopsys to provide us with a silicon-proven IP solution that had all the required features. We knew that Synopsys, a trusted IP vendor, would be there to not only provide us with a high-quality product, but also the expert technical support if and when we needed it."

The DesignWare HDMI IP solution includes a comprehensive set of IP deliverables including baseline software drivers for system development, which help designers quickly embed this complex interface into next-generation multimedia system-on-chips (SoCs). Furthermore, the solution provides the following:

  • Compliance with HDMI and HDCP specifications with certification from the NXP HDMI authorized testing center and successful interoperability results from HDCP plugfest events.
  • A superior analog front end that supports up to 20 foot category 2-certified HDMI cables, while maintaining high performance.
  • Digital controllers delivered in configurable RTL allow designers to optimize gate count and power consumption by choosing only the features required in their application.
  • PHY offering low power consumption and small die area.
  • Numerous optional features such as HDCP encryption engine, audio formats, audio DMA engine and system-bus interfaces which help ease the integration effort.
  • System validation based on the Synopsys Confirma TM HAPS-51 rapid prototyping platform.

"HDMI is a rapidly evolving standard that continues to revolutionize digital home theater systems and other portable multimedia devices," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "Synopsys' DesignWare HDMI IP solutions have been adopted by major OEMs, semiconductor companies, IDMs and foundries worldwide. The availability of the DesignWare HDMI 1.4 digital controller and PHY IP further enables SoC designers and system integrators to introduce the latest features to the market rapidly and with less risk."


Please use one of the following formats to cite this article in your essay, paper or report:

  • APA

    Synopsys, Inc.. (2019, February 14). HDMI PHY IP Available in More than 10 Processes from 90-nm to 40-nm. AZoNano. Retrieved on April 20, 2024 from https://www.azonano.com/news.aspx?newsID=15616.

  • MLA

    Synopsys, Inc.. "HDMI PHY IP Available in More than 10 Processes from 90-nm to 40-nm". AZoNano. 20 April 2024. <https://www.azonano.com/news.aspx?newsID=15616>.

  • Chicago

    Synopsys, Inc.. "HDMI PHY IP Available in More than 10 Processes from 90-nm to 40-nm". AZoNano. https://www.azonano.com/news.aspx?newsID=15616. (accessed April 20, 2024).

  • Harvard

    Synopsys, Inc.. 2019. HDMI PHY IP Available in More than 10 Processes from 90-nm to 40-nm. AZoNano, viewed 20 April 2024, https://www.azonano.com/news.aspx?newsID=15616.

Tell Us What You Think

Do you have a review, update or anything you would like to add to this news story?

Leave your feedback
Your comment type

While we only use edited and approved content for Azthena answers, it may on occasions provide incorrect responses. Please confirm any data provided with the related suppliers or authors. We do not provide medical advice, if you search for medical information you must always consult a medical professional before acting on any information provided.

Your questions, but not your email details will be shared with OpenAI and retained for 30 days in accordance with their privacy principles.

Please do not ask questions that use sensitive or confidential information.

Read the full Terms & Conditions.