Carbon Ion Implantation Technique Allows Direct Synthesis of Wafer-Scale Graphene in Silicon Microelectronics

A team of researchers from Korea University, Seoul, has developed an easy and scalable technique for growing graphene, and have synthetically produced high-quality, multi-layer, wafer-scale graphene on silicon substrates. This latest breakthrough paves the way for using graphene in silicon microelectronics on a commercial scale. The study has been published in AIP Publishing’s journal Applied Physics Letters.

Wafer-scale (4 inch in diameter) synthesis of multi-layer graphene using high-temperature carbon ion implantation on nickel / SiO2 /silicon. CREDIT: J.Kim/Korea University, Korea

The new technique was developed based on ion implantation, wherein ions are made to accelerate under the effect of an electrical field and then crashed into a semiconductor. These ions alter the electrical, chemical, and physical characteristics of the semiconductor.

In the last 10 years, the wonder material graphene has attracted a great deal of attention and has been extensively researched for its unique structural, electrical, optical, and mechanical properties. These single-atom-thick carbon sheets can redefine the way electronic instruments are developed and may lead to faster and affordable solar cells, transistors, more efficient bioelectric sensory instruments, and novel types of sensors.

Wafer-scale graphene is a potential interconnection material and contact electrode that could serve as an integral part in microelectronic circuits. However, a large number of graphene fabrication techniques are not suitable for silicon microelectronics, and this prevents graphene from becoming a profitable material in this particularly industry.

"For integrating graphene into advanced silicon microelectronics, large-area graphene free of wrinkles, tears and residues must be deposited on silicon wafers at low temperatures, which cannot be achieved with conventional graphene synthesis techniques as they often require high temperatures," said Jihyun Kim, the team leader and a professor in the Department of Chemical and Biological Engineering at Korea University. "Our work shows that the carbon ion implantation technique has great potential for the direct synthesis of wafer-scale graphene for integrated circuit technologies."

Graphene was discovered just a few years ago, and is believed to be the world’s strongest, thinnest, and lightest material. It is totally flexible, transparent, non-toxic and cost-effective, and can conduct electricity and heat better than copper, transporting electrons without any major resistance at room temperature. This property is called ballistic transport. The unique properties of this wonder material have resulted in these one-atom-thick carbon layers that are touted to be the most advanced material for electronics that are smaller, faster, cheaper, and use less energy.

"In silicon microelectronics, graphene is a potential contact electrode and an interconnection material linking semiconductor devices to form the desired electrical circuits," said Kim. "This renders high processing temperature undesirable, as temperature-induced damage, strains, metal spiking and unintentional diffusion of dopants may occur."

Chemical vapor deposition (CVD) is a standard graphene fabrication technique which is extensively used in the large-area production of graphene on nickel and copper films. However, this technique is not compatible with silicon microelectronics because this process would demand a high growth temperature of over 1,000 ºC, and the graphene would need to be transferred from the metallic film onto the silicon.

The transferred graphene on the target substrate often contains cracks, wrinkles and contaminants. Thus, we are motivated to develop a transfer-free method to directly synthesize high quality, multilayer graphene in silicon microelectronics.

This latest method makes use of the ion implantation technique, which is compatible with microelectronics and is often utilized to add impurities into semiconductors. In this process, carbon ions are allowed to accelerate under an electrical field before being smashed onto a layered surface made of silicon, nickel, and silicon dioxide at 5000ºC temperature. Here, the layer of nickel with high carbon solubility is utilized as a catalyst to synthesize graphene. This is followed by high temperature activation annealing at approximately 600 to 900 ºC to create carbon atoms arranged in a honeycomb lattice, representing a standard microscopic structure of graphene.

The research team hope to reduce the temperature required in the process even further, and will aim to be able to control how thick the graphene produced will be.


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