AEON NVM on a Standard CMOS Process Eliminates Need for Additional Masks and Processing Steps Required in Traditional Solutions

Virage Logic Corporation (NASDAQ:VIRL), the semiconductor industry's trusted IP partner, today announced it offers the broadest portfolio of embedded non-volatile memory (NVM) at TSMC, with fully qualified IP solutions ranging from 250nm down to 65nm. With a comprehensive selection of multi-time programmable (MTP) and few-time programmable (FTP) NVM IP, the AEON® product family addresses the needs of wireless, automotive, analog, power management and security applications. AEON was developed using proven floating-gate technology on a standard CMOS process that requires no additional masks or processing steps. AEON supports densities from 8 to 16k bits and is multiple-time programmable up to 100k cycles.

“We are pleased to maintain a long-standing partnership with Virage Logic because the company’s IP solutions support NVM products in a wide range of TSMC CMOS processes down to 65nm,” said Dan Kochpatcharin, deputy director of IP Portfolio Marketing at TSMC. “Our customers benefit by reducing power, area and costs while increasing data security over external EEPROM solutions when utilizing Virage Logic’s NVM product offering available for TSMC’s processes.”

Virage Logic’s AEON MTP memory has been shipped in more than one billion integrated circuits (ICs) to date and has been licensed to leading customers including Analog Devices, Linear Technology, Silicon Image, SanDisk, and Avago.

“No other company has a standard CMOS-based embedded NVM offering that provides the number of off-the shelf-configurations or the process node coverage as Virage Logic’s NVM portfolio,” said Dr. Yankin Tanurhan, vice president and general manager, NVM Solutions, Virage Logic. “AEON has more than 600 different qualified configurations and has been developed and silicon-proven at process nodes ranging from 250nm down to 65nm, with 40nm and below currently in development.”

With Virage Logic’s wide-ranging product offering, customers have more options for integrating the flexibility of multiple-time programmable NVM into their designs for wireless, analog, power management and security applications. Designers requiring high reliability use the MTP features of Virage Logic’s NVM to conduct thorough electrical testing and improve overall IC test coverage and security, and encryption designers use it to make the overall system more robust against attacks.

Providing reliability and performance benefits over external one-time programmable (OTP) solutions, AEON also serves as an enabler for new features and functionality in designs. Wireless ICs with embedded memory reduce power consumption of the NVM by 50% to 80% over external electrically erasable programmable read-only memory (EEPROM).

Full characterization and qualification data for Virage Logic’s NVM is available for eligible customers upon request. For specific process availability or to request a silicon characterization report, contact Virage Logic.

Virage Logic will be a featured partner in TSMC’s Open Innovation Platform™ booth (#822) at the Design Automation Conference (DAC) being held July 27-30, 2009, at the Moscone Convention Center in San Francisco, California.

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