Posted in | Nanoelectronics

Institute of Microelectronics Announces Collaborative Partnership with Singapore's Semiconductor Industry Supply Chain Vendors

The Institute of Microelectronics (IME) today announced its collaborative partnership with Singapore's semiconductor industry supply chain vendors to support the research and development of 3-Dimensional (3D) Through-Silicon Via (TSV) Consortium. Key materials providers of the semiconductor industry joined hands with IME and members of the Consortium in the development of a cost-effective TSV process integration and manufacturing capability on 300mm wafers. Supporting companies include 3MTM, Asahi Glass Co., Ltd., Brewer Science Inc., HD Microsystems, Hitachi Chemical Co., Ltd., Nagase and Co., Ltd., Namics Corporation, Nitto Denko (Singapore) Pte. Ltd., OM Group Ultra Pure Chemicals, Sekisui Chemical Co., Ltd., Shanghai Sinyang Semiconductor Materials Co., Ltd., Sumitomo Bakelite Co., Ltd., The Dow Chemical Company and Thin Materials AG.

The 3D TSV Consortium, launched in September 2009 and supported by the Singapore Economic Development Board (EDB) and A*STAR, is to boost 300mm wafer manufacturing capability for Singapore's semiconductor industry. Members of the Consortium include GLOBALFOUNDRIES Singapore Pte. Ltd., STATS ChipPAC Ltd. and United Test and Assembly Center Ltd.

The collaborative approach between the supporting companies and the 3D TSV Consortium is to leverage on each other's unique expertise to co-develop materials required for TSV processes, thin wafer handling and packaging assembly process. The concerted effort will shorten development cycle time and establish an implementable 3D TSV packaging process and design guidelines for industry adoption of 3D TSV. Materials under evaluation by the development team include plating chemicals for TSV filling, chemical-mechanical planarisation (CMP) slurries, sacrificial bonding materials for thin wafer processing and handling, low curing temperature dielectric materials, adhesives for fine-gap and fine-pitch die/wafer-level filling and wafer level encapsulants.

Professor Dim-Lee Kwong, Executive Director of IME, said "The 3D TSV Consortium provides an ideal platform to integrate key companies across Singapore's semiconductor supply chain to co-develop next generation technology. As the semiconductor industry is continually driving down total manufacturing cost, being able to interactively work with materials providers and end users on product requirements and development eliminates costly development oversights. This strategic collaborative partnership reduces the development cycle time, manufacturing cost and risk involved. This harmonisation creates win-win partnerships that will enhance the competitiveness of Singapore's semiconductor industry."

Mr. Damian Chan, Director Electronics, EDB, said "3D TSV is a critical technology that will enable the continued miniaturisation, performance enhancement and energy efficiency of electronics devices such as smart phones, notebooks and e-readers. The participation of these leading materials providers will further increase the depth of 3D TSV Consortium. It will build on the strength of the Singapore semiconductor ecosystem, wherein Singapore's semiconductor output share of global semiconductor revenues has almost doubled from about 6% in 2001 to 11% in 2008."

IME is leading Phase 1 of the Consortium with the goal to establish TSV design and processes for 200mm and 300mm TSV wafers 3D IC assembly, and train a pool of skilled personnel in the semiconductor supply chain companies to support manufacturing of new products with 3D TSVs. Phase 2 will demonstrate the integration of fully functional mobile devices with TSV on a 300mm wafer process line.

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